[PATCH] D78494: [AMDGPU][CODEGEN] Added 'A' constraint for inline assembler

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp marked an inline comment as done.
dp added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10735
+    } else if (BuildVectorSDNode *V = dyn_cast<BuildVectorSDNode>(Op)) {
+      if (Size != 16 || Op.getNumOperands() != 2)
+        return;
----------------
Should we enforce this limitation? GCC seems to allow arbitrary vector size and type provided that all elements are equal and may be inlined.


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  https://reviews.llvm.org/D78494/new/

https://reviews.llvm.org/D78494