[PATCH] D78811: [AMDGPU] Enable base pointer.

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 4 07:27:21 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:109
+
+  if (!TempSGPR) {
+    // There's no free lane to spill, and no free register to save FP/BP,
----------------
This should early return if findScratchNonCalleeSaveRegister and reduce the indentation for the rest of the function


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:677
+  // used in the copy instructions live throughout the function.
+  SmallVector<MCPhysReg, 4> TempSGPRs;
+  if (FuncInfo->SGPRForFPSaveRestoreCopy)
----------------
Make the small size 2 since that's all that's used


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78811/new/

https://reviews.llvm.org/D78811





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