[PATCH] D79316: [CodeGen] Make logic of resultsCompatible clearer

David Spickett via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 4 02:37:58 PDT 2020


DavidSpickett created this revision.
DavidSpickett added reviewers: eli.friedman, MatzeB.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D79316

Files:
  llvm/lib/CodeGen/CallingConvLower.cpp


Index: llvm/lib/CodeGen/CallingConvLower.cpp
===================================================================
--- llvm/lib/CodeGen/CallingConvLower.cpp
+++ llvm/lib/CodeGen/CallingConvLower.cpp
@@ -276,18 +276,23 @@
   for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
     const CCValAssign &Loc1 = RVLocs1[I];
     const CCValAssign &Loc2 = RVLocs2[I];
+    // Must fill the same part of their locations
     if (Loc1.getLocInfo() != Loc2.getLocInfo())
       return false;
-    bool RegLoc1 = Loc1.isRegLoc();
-    if (RegLoc1 != Loc2.isRegLoc())
-      return false;
-    if (RegLoc1) {
-      if (Loc1.getLocReg() != Loc2.getLocReg())
+
+    if (Loc1.isRegLoc() && Loc2.isRegLoc()) {
+      if (Loc1.getLocReg() != Loc2.getLocReg()) {
         return false;
-    } else {
-      if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
+      }
+    } else if (Loc1.isMemLoc() && Loc2.isMemLoc()) {
+      if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset()) {
         return false;
+      }
+    } else {
+      // Mix of register/memory is not compatible
+      return false;
     }
   }
+
   return true;
 }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D79316.261759.patch
Type: text/x-patch
Size: 1124 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200504/91cc9a81/attachment.bin>


More information about the llvm-commits mailing list