[llvm] 8e05ac0 - [DAGCombine] visitTRUNCATE - remove GetDemandedBits call

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-05-02T19:52:17+01:00
New Revision: 8e05ac0a510c12cbe887aeb2ae9e9b030a010d3b

URL: https://github.com/llvm/llvm-project/commit/8e05ac0a510c12cbe887aeb2ae9e9b030a010d3b
DIFF: https://github.com/llvm/llvm-project/commit/8e05ac0a510c12cbe887aeb2ae9e9b030a010d3b.diff

LOG: [DAGCombine] visitTRUNCATE - remove GetDemandedBits call

rL368553 added SimplifyMultipleUseDemandedBits handling for ISD::TRUNCATE to SimplifyDemandedBits so we don't need to duplicate this (and it gets rid of another GetDemandedBits call which is slowly being replaced with SimplifyMultipleUseDemandedBits anyhow).

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d8c6b51db9c6..3c8d1f3c7f36 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -11112,18 +11112,6 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
     }
   }
 
-  // See if we can simplify the input to this truncate through knowledge that
-  // only the low bits are being used.
-  // For example "trunc (or (shl x, 8), y)" // -> trunc y
-  // Currently we only perform this optimization on scalars because vectors
-  // may have 
diff erent active low bits.
-  if (!VT.isVector()) {
-    APInt Mask =
-        APInt::getLowBitsSet(N0.getValueSizeInBits(), VT.getSizeInBits());
-    if (SDValue Shorter = DAG.GetDemandedBits(N0, Mask))
-      return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, Shorter);
-  }
-
   // fold (truncate (load x)) -> (smaller load x)
   // fold (truncate (srl (load x), c)) -> (smaller load (x+c/evtbits))
   if (!LegalTypes || TLI.isTypeDesirableForOp(N0.getOpcode(), VT)) {