[PATCH] D79272: [mlir][StandardToSPIRV] Emulate bitwidths not supported for store op.

[Han-Chung Wang via Phabricator via llvm-commits]

hanchung created this revision.
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As D78974 <https://reviews.llvm.org/D78974>, this patch implements the emulation for store op. The emulation is
done with atomic operations. E.g., if the storing value is i8, rewrite the
StoreOp to:

1. load a 32-bit integer
2. clear 8 bits in the loading value
3. store 32-bit value back
4. load a 32-bit integer
5. modify 8 bits in the loading value
6. store 32-bit value back

The step 1 to step 3 are done by AtomicAnd, and the step 4 to step 6 are done
by AtomicOr.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D79272

Files:
  mlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
  mlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir

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