[PATCH] D76356: [AMDGPU] Introduce more scratch registers in the ABI.
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 1 17:15:48 PDT 2020
arsenm accepted this revision.
arsenm added a comment.
LGTM with test nits. This isn't perfect but we can't do much better now
================
Comment at: llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll:6
+
+define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %zcompare, float %s, float %t, float %clamp) {
+; The vgpr tuple8 operand in image_gather4_c_b_cl instruction needs not be
----------------
inreg currently doesn't do anything for non-shaders, so you should remove it here.
================
Comment at: llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll:8
+; The vgpr tuple8 operand in image_gather4_c_b_cl instruction needs not be
+; presreved across the call and should get 8 scratch registers.
+
----------------
Typo presreved
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D76356/new/
https://reviews.llvm.org/D76356
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