[PATCH] D79224: [WebAssembly] Renumber SIMD opcodes

[Heejin Ahn via Phabricator via llvm-commits]

aheejin accepted this revision.
aheejin added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:186
     // 64x2 conversions are not in the spec
-    if (!Subtarget->hasUnimplementedSIMD128())
-      for (auto Op :
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So these have been decided not be included in the spec?


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Comment at: llvm/test/CodeGen/WebAssembly/simd-conversions.ll:88
-; SIMD128-NEXT: i64x2.trunc_sat_f64x2_u $push[[R:[0-9]+]]=, $0
-; SIMD128-NEXT: return $pop[[R]]
 define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
----------------
We don't need this anymore?


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Comment at: llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll:479
-  ret <2 x i64> %a
-}
-
----------------
Ditto


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79224/new/

https://reviews.llvm.org/D79224