[PATCH] D78091: [AMDGPU] Enable carry out ADD/SUB operations divergence driven instruction selection.

[Alexander via Phabricator via llvm-commits]

alex-t added a comment.

In D78091#2011048 <https://reviews.llvm.org/D78091#2011048>, @rampitec wrote:

> Can you add tests with both immediates? You will probably need to -start-before=amdgpu-isel or -O0 if it will be constant folded.
>  Also fix formatting issues.


There is a reason for not adding such a test.
SelectionDAG::getNode() performs trivial constant folding irrelative of the optLevel.

See SelectionDAG.cpp::5469 for details

  // Perform trivial constant folding.
  if (SDValue SV = FoldConstantArithmetic(Opcode, DL, VT, {N1, N2}))
    return SV;

The result of the visiting ISD::ADD with 2 immediates looks like:
F11829329: DAGConstantFolding.png <https://reviews.llvm.org/F11829329>

So the add is selected to 2 moves.

  %add = add i64 20015998343286, 46117495621    to the 
  
  %5:sreg_32 = S_MOV_B32 4671
  %6:sreg_32 = S_MOV_B32 323599291


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