[PATCH] D78829: [AMDGPU] Make SREG_LO16 legal

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 29 13:28:09 PDT 2020


rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:151-152
   if (Subtarget->has16BitInsts()) {
-    addRegisterClass(MVT::i16, &AMDGPU::SReg_32RegClass);
-    addRegisterClass(MVT::f16, &AMDGPU::SReg_32RegClass);
+    addRegisterClass(MVT::i16, &AMDGPU::SGPR_LO16RegClass);
+    addRegisterClass(MVT::f16, &AMDGPU::SGPR_LO16RegClass);
 
----------------
rampitec wrote:
> arsenm wrote:
> > These are still here, although contrary to your last comment that we don't need to make these legal yet? (which I interpreted as using as a legal type reg class)
> Yes, this is still here just for discussion purposes. I think I will drop this part and revert tests as well, but add a mir test for copyPhysReg() instead.
CopyPhysReg is extracted into D79119.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78829/new/

https://reviews.llvm.org/D78829





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