[PATCH] D76356: [AMDGPU] Introduce more scratch registers in the ABI.

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas updated this revision to Diff 261054.
cdevadas edited the summary of this revision.
cdevadas added a comment.

Divided the VGPRs into equal number of CSRs and scratch registers. Also, added a test case for VGPR tuple allocation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76356/new/

https://reviews.llvm.org/D76356

Files:
  llvm/docs/AMDGPUUsage.rst
  llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
  llvm/test/CodeGen/AMDGPU/call-argument-types.ll
  llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
  llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
  llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
  llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
  llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
  llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
  llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
  llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
  llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
  llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
  llvm/test/CodeGen/AMDGPU/nested-calls.ll
  llvm/test/CodeGen/AMDGPU/regbank-reassign.mir
  llvm/test/CodeGen/AMDGPU/sibling-call.ll
  llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
  llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
  llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
  llvm/test/CodeGen/AMDGPU/virtregrewrite-undef-identity-copy.mir
  llvm/test/CodeGen/AMDGPU/wave32.ll

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