[PATCH] D78431: [ELF][PPC64] Don't perform toc-indirect to toc-relative relaxation for R_PPC64_TOC16_HA not followed by R_PPC64_TOC16_LO_DS

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added a comment.

In D78431#2010238 <https://reviews.llvm.org/D78431#2010238>, @sfertile wrote:

> I had to pull this as it breaks the PPC mutlistage LLD bot.  Consider the following input:
>
>   addis r3, r2, .LC0 at toc@ha  # No longer gets optimized
>   addis r4, r2, .LC1 at toc@ha
>   ld  r3, .LC0 at toc@l(r3)
>   ld r4, .LC1 at toc@l(r4) 
>   
>
> I should have caught this in the initial review, so I am sorry for the churn.


Oh, I did not know this can be interleaved. Can you point me to an example?

> I think I have an alternative 'big-hammer' approach that will work and not be too intrusive to the rest of LLD.
> 
> There is a bit free in the Symbol class. We can use that to indicate if we have to disable toc optimizations through this symbol. In ScanRelocs if we find a `R_PPC64_TOC16_LO` relocation to a toc-entry, we set the bit on the referenced sym. That will disable toc-optimizations to any symbol referenced through that objects toc-section.

We have a spare bit after `Symbol::scriptDefined`. Indeed it seems that a stateless transformation is problematic. Adding logic to `scanRelocs` is probably the best approach.


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