[lld] f9106e8 - Revert "[ELF][PPC64] Don't perform toc-indirect to toc-relative relax... "
Sean Fertile via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 29 07:31:44 PDT 2020
Author: Sean Fertile
Date: 2020-04-29T10:30:35-04:00
New Revision: f9106e85c424756bcd1378d6a00bb582cc2114bb
URL: https://github.com/llvm/llvm-project/commit/f9106e85c424756bcd1378d6a00bb582cc2114bb
DIFF: https://github.com/llvm/llvm-project/commit/f9106e85c424756bcd1378d6a00bb582cc2114bb.diff
LOG: Revert "[ELF][PPC64] Don't perform toc-indirect to toc-relative relax... "
This reverts commit 03ffe5860549e97a0f2d8262b100e8910f61c528.
Full tile of reverted commit is:
[ELF][PPC64] Don't perform toc-indirect to toc-relative relaxation for
R_PPC64_TOC16_HA not followed by R_PPC64_TOC16_LO_DS
Breaks the multistage lld PowerPC buildbot.
Added:
Modified:
lld/ELF/InputSection.cpp
Removed:
lld/test/ELF/ppc64-toc-relax2.s
################################################################################
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index 912960d02f46..b9b6fef9dc48 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -949,8 +949,7 @@ void InputSectionBase::relocateAlloc(uint8_t *buf, uint8_t *bufEnd) {
assert(flags & SHF_ALLOC);
const unsigned bits = config->wordsize * 8;
- for (size_t i = 0, e = relocations.size(); i != e; ++i) {
- const Relocation &rel = relocations[i];
+ for (const Relocation &rel : relocations) {
if (rel.expr == R_NONE)
continue;
uint64_t offset = rel.offset;
@@ -970,16 +969,10 @@ void InputSectionBase::relocateAlloc(uint8_t *buf, uint8_t *bufEnd) {
case R_RELAX_GOT_PC_NOPIC:
target->relaxGot(bufLoc, rel, targetVA);
break;
- case R_PPC64_RELAX_TOC: {
- // For R_PPC64_TOC16_HA, if it is not paired with an R_PPC64_TOC16_LO_DS,
- // don't relax.
- bool relax =
- rel.type == R_PPC64_TOC16_LO_DS ||
- (i + 1 != e && relocations[i + 1].type == R_PPC64_TOC16_LO_DS);
- if (!relax || !tryRelaxPPC64TocIndirection(rel, bufLoc))
+ case R_PPC64_RELAX_TOC:
+ if (!tryRelaxPPC64TocIndirection(rel, bufLoc))
target->relocate(bufLoc, rel, targetVA);
break;
- }
case R_RELAX_TLS_IE_TO_LE:
target->relaxTlsIeToLe(bufLoc, rel, targetVA);
break;
diff --git a/lld/test/ELF/ppc64-toc-relax2.s b/lld/test/ELF/ppc64-toc-relax2.s
deleted file mode 100644
index f768046551df..000000000000
--- a/lld/test/ELF/ppc64-toc-relax2.s
+++ /dev/null
@@ -1,34 +0,0 @@
-# REQUIRES: ppc
-# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
-# RUN: ld.lld %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck %s
-
-# CHECK-LABEL: <_start>:
-.globl _start
-_start:
-## Perform toc-indirect to toc-relative relaxation even if there are unrelated instructions in between.
-# CHECK-NEXT: addis 3, 2, -1
-# CHECK-NEXT: li 9, 0
-# CHECK-NEXT: addi 3, 3, -32768
-# CHECK-NEXT: lwa 3, 0(3)
-# CHECK-NEXT: li 9, 0
- addis 3, 2, .LC0 at toc@ha # R_PPC64_TOC16_HA
- li 9, 0
- ld 3, .LC0 at toc@l(3) # R_PPC64_TOC16_LO_DS
- lwa 3, 0(3)
- li 9, 0
-
-## The R_PPC64_TOC16_HA is not followed by an R_PPC64_TOC16_LO_DS.
-## Don't perform toc-indirect to toc-relative relaxation.
-# CHECK-NEXT: nop
-# CHECK-NEXT: addi 3, 2, -32768
-# CHECK-NEXT: blr
- addis 3, 2, .LC0 at toc@ha # R_PPC64_TOC16_HA
- addi 3, 3, .LC0 at toc@l # R_PPC64_TOC16_LO
- blr
-
-AES_encrypt:
-
-.section .toc,"aw", at progbits
-.LC0:
- .tc AES_encrypt[TC], AES_encrypt
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