[PATCH] D78992: [CodeGen] Add support for inserting elements into scalable vectors
David Sherwood via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 29 01:02:14 PDT 2020
david-arm marked an inline comment as done.
david-arm added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/sve-insert-element.ll:6
+; CHECK: mov [[REG:.*]], #30
+; CHECK: mov z0.b, p{{.*}}/m, [[REG]]
+ %b = insertelement <vscale x 16 x i8> %a, i8 30, i32 0
----------------
c-rhodes wrote:
> I think it would be better to be a little stricter in the predicate regexs throughout the test and use: `p[0-9]+`. The same applies to Z regs as well in a few places.
OK sure. The reason I didn't match them more precisely was because I'd assumed we had other more basic tests that captured such cases and I thought with these tests the main thing I wanted to check was that we did something sensible for the code paths changed in this patch. Are you specifically concerned about the two different predicate ranges, 0-7 vs 0-15 inclusive?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78992/new/
https://reviews.llvm.org/D78992
More information about the llvm-commits
mailing list