[PATCH] D79062: [mlir][Vector] Provide progressive lowering of masked n-D vector transfers

[River Riddle via Phabricator via llvm-commits]

rriddle resigned from this revision.
rriddle added inline comments.


================
Comment at: mlir/lib/Conversion/VectorToLoops/ConvertVectorToLoops.cpp:71
+///   %res = load(%tmp, %0): memref<(major_dims) x vector<minor_dim x type>>):
+//      vector<(major_dims) x (minor_dims) x type>
+/// ```
----------------
///?


================
Comment at: mlir/lib/Conversion/VectorToLoops/ConvertVectorToLoops.cpp:137
+  AffineLoopNestBuilder(majorIvs, majorLbs, majorUbs, majorSteps)([&] {
+    SmallVector<Value, 8> indices(xferOp.indices());
+    loopBody(
----------------
Why are you building a vector here? Is it because AffineLoopNestBuilder takes an ArrayRef<Value> instead of ValueRange?


================
Comment at: mlir/lib/Conversion/VectorToLoops/ConvertVectorToLoops.cpp:159
+    Value inBounds2 = majorIvsPlusOffsets.back() < ub;
+    inBounds = inBounds && inBounds2;
+  }
----------------
inbounds &= inBounds2;?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79062/new/

https://reviews.llvm.org/D79062