[PATCH] D79055: [LiveVariables] Mark PhysReg implicit-def MachineOperands of INLINEASM_BR as LiveOut
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 28 17:18:10 PDT 2020
nickdesaulniers created this revision.
nickdesaulniers added reviewers: efriedma, void, arsenm.
Herald added subscribers: llvm-commits, hiraditya, wdng.
Herald added a project: LLVM.
D78586 <https://reviews.llvm.org/D78586> implements good sanity checks in MachineVerifier that for each
LiveIn register to a MachineBasicBlock, that at least one predecessor
MachineBasicBlock defines the register as LiveOut.
The PhysReg MachineOperands for INLINEASM_BR MachineInstrs were being
implicit-def'd but marked dead (i.e. no uses in local MachineBasicBlock)
by live-vars.
ScheduleDAGSDNodes::EmitSchedule() splits the MachineBasicBlock
containing the INLINEASM_BR, post that MachineInstr, and marks the
LiveIns. But there's no marking of LiveOuts. If a use is visible within
the same MachineBasicBlock, live-vars will calculate the LiveOuts
correctly.
Since the uses aren't visible in the same MachineBasicBlock as the
INLINEASM_BR MachineInstr, teach LiveVariables::runOnBlock() to special
case INLINEASM_BR's PhysReg defs, so that they're not marked dead.
Implementing TCOPY (D75098 <https://reviews.llvm.org/D75098>) should also make the uses visible to
live-vars as well, at which point, this change to LiveVariables should
be reverted (but not the tests).
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D79055
Files:
llvm/lib/CodeGen/LiveVariables.cpp
llvm/test/CodeGen/X86/callbr-asm-outputs.ll
Index: llvm/test/CodeGen/X86/callbr-asm-outputs.ll
===================================================================
--- llvm/test/CodeGen/X86/callbr-asm-outputs.ll
+++ llvm/test/CodeGen/X86/callbr-asm-outputs.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i686-- -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -print-after=livevars -stop-after=livevars < %s 2>&1 | FileCheck --check-prefix=LIVE-CHECK %s
; A test for asm-goto output
@@ -81,10 +82,17 @@
%0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "={si},={di},r,X,X,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i8* blockaddress(@test2, %label_true), i8* blockaddress(@test2, %return), i32 %out1, i32 %out2)
to label %if.end [label %label_true, label %return]
+; Test that these physical registers are not `implicit-def dead`, i.e. both
+; defined by this instruction, and yet dead/no users.
+
+; LIVE-CHECK: INLINEASM_BR{{.*}}implicit-def $esi,{{.*}}implicit-def $edi,
+
if.else: ; preds = %entry
%1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "={si},={di},r,r,X,X,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i32 %out2, i8* blockaddress(@test2, %label_true), i8* blockaddress(@test2, %return), i32 %out1, i32 %out2)
to label %if.end [label %label_true, label %return]
+; LIVE-CHECK: INLINEASM_BR{{.*}}implicit-def $esi,{{.*}}implicit-def $edi,
+
if.end: ; preds = %if.else, %if.then
%.sink11 = phi { i32, i32 } [ %0, %if.then ], [ %1, %if.else ]
%asmresult3 = extractvalue { i32, i32 } %.sink11, 0
Index: llvm/lib/CodeGen/LiveVariables.cpp
===================================================================
--- llvm/lib/CodeGen/LiveVariables.cpp
+++ llvm/lib/CodeGen/LiveVariables.cpp
@@ -610,6 +610,15 @@
}
}
+ // INLINEASM_BR's define physical registers are live, though we don't see
+ // their uses in the split copy block.
+ for (const MachineInstr &MI : MBB->terminators())
+ if (MI.getOpcode() == TargetOpcode::INLINEASM_BR)
+ for (const MachineOperand &MO : MI.operands())
+ if (MO.isReg() && Register::isPhysicalRegister(MO.getReg()) &&
+ MO.isDef() && !MO.isDead() && !MO.isEarlyClobber())
+ LiveOuts.insert(MO.getReg());
+
// Loop over PhysRegDef / PhysRegUse, killing any registers that are
// available at the end of the basic block.
for (unsigned i = 0; i != NumRegs; ++i)
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