[PATCH] D78723: [AArch64][SVE] Custom lowering of floating-point reductions
Cullen Rhodes via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 28 08:02:04 PDT 2020
c-rhodes updated this revision to Diff 260634.
c-rhodes added a comment.
Changes:
- Replace `LowerEXTRACT_VECTOR_ELT` changes with ISEL patterns.
- Remove scalable vector -> fixed-width `extract_subvector` patterns which are no longer needed with above patterns.
- Remove TableGen change which is no longer needed after removing the above patterns.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78723/new/
https://reviews.llvm.org/D78723
Files:
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve-intrinsics-fp-reduce.ll
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