[llvm] 949018c - [PowerPC] add test case for reorder operands of qpx fma instr - nfc.

Chen Zheng via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 28 01:50:17 PDT 2020


Author: Chen Zheng
Date: 2020-04-28T04:43:32-04:00
New Revision: 949018cc279c42640ea4531dfe132e15c9d97938

URL: https://github.com/llvm/llvm-project/commit/949018cc279c42640ea4531dfe132e15c9d97938
DIFF: https://github.com/llvm/llvm-project/commit/949018cc279c42640ea4531dfe132e15c9d97938.diff

LOG: [PowerPC] add test case for reorder operands of qpx fma instr - nfc.

Added: 
    llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll b/llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll
new file mode 100644
index 000000000000..9ce295f6be4b
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll
@@ -0,0 +1,19 @@
+; RUN: llc -verify-machineinstrs -stop-after=finalize-isel < %s -mcpu=a2q | FileCheck %s
+
+define <2 x double> @test_qvfmadd(<2 x double> %0, <2 x double> %1, <2 x double> %2) {
+; CHECK: test_qvfmadd
+; CHECK: QVFMADD %2, %0, %1, implicit $rm
+;
+  %4 = fmul reassoc nsz <2 x double> %2, %1
+  %5 = fadd reassoc nsz <2 x double> %4, %0
+  ret <2 x double> %5
+}
+
+define <4 x float> @test_qvfmadds(<4 x float> %0, <4 x float> %1, <4 x float> %2) {
+; CHECK: test_qvfmadds
+; CHECK: QVFMADDSs %2, %0, %1, implicit $rm
+;
+  %4 = fmul reassoc nsz <4 x float> %2, %1
+  %5 = fadd reassoc nsz <4 x float> %4, %0
+  ret <4 x float> %5
+}


        


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