[PATCH] D78829: [AMDGPU] Make SREG_LO16 legal

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec marked an inline comment as done.
rampitec added inline comments.
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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:544-547
+    }
+
+    RC = RI.getPhysRegClass(DestReg);
+  }
----------------
arsenm wrote:
> rampitec wrote:
> > arsenm wrote:
> > > We should make it so that MachineCopyPropagation can deal with this case
> > Hm... So you want it always? I thought this is a red flag.
> I mean MCP should eliminate these identity copies. It shouldn't see the src == dest due to 16-bit obscuring this (at least for > -O0)
Could it? Assume:

$vgpr1 = $vgpr2_lo16
%vgpr1 = %vgpr2.lo16

It does not tell anything about the contents of a high half after the copy. Basically semantics of these is unclear. We can argue a reverse situation is a truncation, but really undefined as well because it would be unrepresentable.


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https://reviews.llvm.org/D78829