[PATCH] D78010: [CodeGen] Add new function unionImplicitOps() to union implicit register
Zhang Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 24 03:13:10 PDT 2020
ZhangKang updated this revision to Diff 259840.
ZhangKang marked an inline comment as done.
ZhangKang added a comment.
Move the assert before if condition.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78010/new/
https://reviews.llvm.org/D78010
Files:
llvm/include/llvm/CodeGen/MachineInstr.h
llvm/include/llvm/CodeGen/MachineInstrBuilder.h
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
llvm/test/CodeGen/PowerPC/early-ret-verify.mir
llvm/test/CodeGen/PowerPC/early-ret.mir
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D78010.259840.patch
Type: text/x-patch
Size: 6526 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200424/1eb13e41/attachment.bin>
More information about the llvm-commits
mailing list