[llvm] d8e1dd8 - [Hexagon] Add missing live-in registers in some codegen tests
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 23 08:28:19 PDT 2020
Author: Krzysztof Parzyszek
Date: 2020-04-23T10:28:04-05:00
New Revision: d8e1dd8b9b6554b750b6727a521c28b58ae79c1f
URL: https://github.com/llvm/llvm-project/commit/d8e1dd8b9b6554b750b6727a521c28b58ae79c1f
DIFF: https://github.com/llvm/llvm-project/commit/d8e1dd8b9b6554b750b6727a521c28b58ae79c1f.diff
LOG: [Hexagon] Add missing live-in registers in some codegen tests
Added:
Modified:
llvm/test/CodeGen/Hexagon/livephysregs-lane-masks.mir
llvm/test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
llvm/test/CodeGen/Hexagon/vgather-packetize.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks.mir b/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks.mir
index c4bc008095a8..cea9b72e7d58 100644
--- a/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks.mir
+++ b/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks.mir
@@ -18,7 +18,7 @@ tracksRegLiveness: true
body: |
bb.0:
- liveins: $r16
+ liveins: $r0, $r16
successors: %bb.1, %bb.2
$p0 = C2_cmpeqi $r16, 0
J2_jumpt $p0, %bb.2, implicit-def $pc
diff --git a/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks2.mir b/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
index 881498e646e4..a1f988d0b05f 100644
--- a/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
+++ b/llvm/test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
@@ -13,7 +13,7 @@ tracksRegLiveness: true
body: |
bb.0:
- liveins: $p0:0x1, $p2, $r0
+ liveins: $p0:0x1, $p2, $r0, $r18, $r19
successors: %bb.1, %bb.2
J2_jumpt killed $p2, %bb.1, implicit-def $pc
J2_jump %bb.2, implicit-def $pc
diff --git a/llvm/test/CodeGen/Hexagon/vgather-packetize.mir b/llvm/test/CodeGen/Hexagon/vgather-packetize.mir
index d575880a650c..688a770ad2bf 100644
--- a/llvm/test/CodeGen/Hexagon/vgather-packetize.mir
+++ b/llvm/test/CodeGen/Hexagon/vgather-packetize.mir
@@ -12,16 +12,16 @@ name: fred
tracksRegLiveness: true
body: |
bb.0:
- liveins: $r0, $w0
+ liveins: $r0, $r1, $r2, $m0, $w0
$r1 = A2_tfrsi 2
$r2 = A2_tfrsi 1
- $m0 = A2_tfrrcr killed $r1
+ $m0 = A2_tfrrcr $r1
J2_loop0i %bb.1, 128, implicit-def $lc0, implicit-def $sa0, implicit-def $usr
bb.1:
liveins: $r0, $r1, $r2, $m0, $w0
$r1 = A2_addi $r1, 1
- V6_vgathermhw_pseudo killed $r0, killed $r2, killed $m0, killed $w0, implicit-def $vtmp
+ V6_vgathermhw_pseudo $r0, $r2, $m0, $w0, implicit-def $vtmp
ENDLOOP0 %bb.1, implicit $lc0, implicit $sa0, implicit-def $lc0, implicit-def $p3, implicit-def $pc, implicit-def $usr
bb.2:
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