[llvm] 6b58018 - [ARM] Mark some tests as not safe for -debugify-and-strip-all, NFC

[Vedant Kumar via llvm-commits]

Author: Vedant Kumar
Date: 2020-04-22T17:03:39-07:00
New Revision: 6b58018c05f0aa6e8c648aef652fbf25793b9e3d

URL: https://github.com/llvm/llvm-project/commit/6b58018c05f0aa6e8c648aef652fbf25793b9e3d
DIFF: https://github.com/llvm/llvm-project/commit/6b58018c05f0aa6e8c648aef652fbf25793b9e3d.diff

LOG: [ARM] Mark some tests as not safe for -debugify-and-strip-all, NFC

These tests contain debug instructions which get checked, so we can't
insert synthetic debug info and expect the tests to pass.

The rest of the ARM backend tests appear to be fair game.

Added: 
    

Modified: 
    llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
    llvm/test/CodeGen/ARM/fold-sext-sextload.ll
    llvm/test/CodeGen/ARM/fold-zext-zextload.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
index 47f4b6649006..2b695c204a9e 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple arm-- -run-pass=regbankselect %s -o - | FileCheck %s
-# RUN: llc -mtriple thumbv7-- -run-pass=regbankselect %s -o - | FileCheck %s
+# RUN: llc -debugify-and-strip-all-safe=0 -mtriple arm-- -run-pass=regbankselect %s -o - | FileCheck %s
+# RUN: llc -debugify-and-strip-all-safe=0 -mtriple thumbv7-- -run-pass=regbankselect %s -o - | FileCheck %s
 --- |
   define void @test_add_s32() { ret void }
   define void @test_sub_s32() { ret void }

diff  --git a/llvm/test/CodeGen/ARM/fold-sext-sextload.ll b/llvm/test/CodeGen/ARM/fold-sext-sextload.ll
index 96e2e78a47d4..beea9e71cee8 100644
--- a/llvm/test/CodeGen/ARM/fold-sext-sextload.ll
+++ b/llvm/test/CodeGen/ARM/fold-sext-sextload.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple armv7 %s -stop-before=livedebugvalues -o - | FileCheck %s
+; RUN: llc -debugify-and-strip-all-safe=0 -mtriple armv7 %s -stop-before=livedebugvalues -o - | FileCheck %s
 
 define <4 x i8> @i(<4 x i8>*, <4 x i8>) !dbg !8 {
   %3 = load <4 x i8>, <4 x i8>* %0, align 4, !dbg !14

diff  --git a/llvm/test/CodeGen/ARM/fold-zext-zextload.ll b/llvm/test/CodeGen/ARM/fold-zext-zextload.ll
index 25e226fda664..28224de901ab 100644
--- a/llvm/test/CodeGen/ARM/fold-zext-zextload.ll
+++ b/llvm/test/CodeGen/ARM/fold-zext-zextload.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple armv7 %s -stop-before=livedebugvalues -o - | FileCheck %s
+; RUN: llc -debugify-and-strip-all-safe=0 -mtriple armv7 %s -stop-before=livedebugvalues -o - | FileCheck %s
 
 define <4 x i8> @i(<4 x i8>*, <4 x i8>) !dbg !8 {
   %3 = load <4 x i8>, <4 x i8>* %0, align 4, !dbg !14