[PATCH] D76294: [PowerPC][Future] Add initial support for PC Relative addressing to get block address

[Kamau Bridgeman via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGa60ca4b4e9b1: [PowerPC][Future] Initial support for PCRel addressing to get block address (authored by NeHuang, committed by kamaub).

Changed prior to commit:
  https://reviews.llvm.org/D76294?vs=258163&id=259373#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76294/new/

https://reviews.llvm.org/D76294

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/pcrel-block-address.ll


Index: llvm/test/CodeGen/PowerPC/pcrel-block-address.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/pcrel-block-address.ll
@@ -0,0 +1,16 @@
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s | FileCheck %s
+define dso_local void @blockaddress() {
+; CHECK-LABEL: blockaddress:
+; CHECK:       # %bb.0: # %entry
+; CHECK:       paddi r3, 0, .Ltmp0 at PCREL, 1
+; CHECK:       bl helper at notoc
+entry:
+  tail call void @helper(i8* blockaddress(@blockaddress, %label))
+  br label %label
+
+label:                                            ; preds = %entry
+  ret void
+}
+
+declare void @helper(i8*)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2588,6 +2588,11 @@
   return true;
 }
 
+template <typename Ty> static bool isValidPCRelNode(SDValue N) {
+  Ty *PCRelCand = dyn_cast<Ty>(N);
+  return PCRelCand && (PCRelCand->getTargetFlags() & PPCII::MO_PCREL_FLAG);
+}
+
 /// Returns true if this address is a PC Relative address.
 /// PC Relative addresses are marked with the flag PPCII::MO_PCREL_FLAG
 /// or if the node opcode is PPCISD::MAT_PCREL_ADDR.
@@ -2596,15 +2601,11 @@
   Base = N;
   if (N.getOpcode() == PPCISD::MAT_PCREL_ADDR)
     return true;
-  if (ConstantPoolSDNode *CPN = dyn_cast<ConstantPoolSDNode>(N))
-    if (CPN->getTargetFlags() & PPCII::MO_PCREL_FLAG)
-      return true;
-  if (GlobalAddressSDNode *GAN = dyn_cast<GlobalAddressSDNode>(N))
-    if (GAN->getTargetFlags() & PPCII::MO_PCREL_FLAG)
-      return true;
-  if (JumpTableSDNode *JT = dyn_cast<JumpTableSDNode>(N))
-    if (JT->getTargetFlags() & PPCII::MO_PCREL_FLAG)
-      return true;
+  if (isValidPCRelNode<ConstantPoolSDNode>(N) ||
+      isValidPCRelNode<GlobalAddressSDNode>(N) ||
+      isValidPCRelNode<JumpTableSDNode>(N) ||
+      isValidPCRelNode<BlockAddressSDNode>(N))
+    return true;
   return false;
 }
 
@@ -2936,6 +2937,16 @@
   BlockAddressSDNode *BASDN = cast<BlockAddressSDNode>(Op);
   const BlockAddress *BA = BASDN->getBlockAddress();
 
+  // isUsingPCRelativeCalls() returns true when PCRelative is enabled
+  if (Subtarget.isUsingPCRelativeCalls()) {
+    SDLoc DL(BASDN);
+    EVT Ty = getPointerTy(DAG.getDataLayout());
+    SDValue GA = DAG.getTargetBlockAddress(BA, Ty, BASDN->getOffset(),
+                                           PPCII::MO_PCREL_FLAG);
+    SDValue MatAddr = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
+    return MatAddr;
+  }
+
   // 64-bit SVR4 ABI and AIX ABI code are always position-independent.
   // The actual BlockAddress is stored in the TOC.
   if (Subtarget.is64BitELFABI() || Subtarget.isAIXABI()) {


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