[PATCH] D77966: [llvm][MIRVRegNamer] Avoid collisions across jump table indices.

Puyan Lotfi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 22 12:31:12 PDT 2020


This revision was automatically updated to reflect the committed changes.
Closed by commit rG264c07ef7766: [llvm][MIRVRegNamer] Avoid collisions across jump table indices. (authored by plotfi).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77966/new/

https://reviews.llvm.org/D77966

Files:
  llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
  llvm/test/CodeGen/MIR/AArch64/mir-canon-jump-table.mir


Index: llvm/test/CodeGen/MIR/AArch64/mir-canon-jump-table.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/MIR/AArch64/mir-canon-jump-table.mir
@@ -0,0 +1,33 @@
+# RUN: llc -run-pass mir-canonicalizer -verify-machineinstrs -mtriple aarch64-unknown-linux-gnu -o - %s | FileCheck %s
+...
+---
+name: foo
+alignment:       16
+jumpTable:
+  kind:  block-address
+  entries:
+    - id:              0
+      blocks:          [ '%bb.0', '%bb.1']
+    - id:              1
+      blocks:          [ '%bb.2', '%bb.3' ]
+    - id:              2
+      blocks:          [ '%bb.3', '%bb.7']
+    - id:              3
+      blocks:          [ '%bb.2', '%bb.3' ]
+body:             |
+  bb.0:
+  bb.1:
+  bb.2:
+  bb.3:
+  bb.7:
+    ;CHECK: %bb{{[0-9]+}}_{{[0-9]+}}__1:_(p0) = G_JUMP_TABLE %jump-table.0
+    ;CHECK: %bb{{[0-9]+}}_{{[0-9]+}}__1:_(p0) = G_JUMP_TABLE %jump-table.1
+    ;CHECK: %bb{{[0-9]+}}_{{[0-9]+}}__1:_(p0) = G_JUMP_TABLE %jump-table.2
+    ;CHECK: %bb{{[0-9]+}}_{{[0-9]+}}__1:_(p0) = G_JUMP_TABLE %jump-table.3
+    %a:_(p0) = G_JUMP_TABLE %jump-table.0
+    %b:_(p0) = G_JUMP_TABLE %jump-table.1
+    %c:_(p0) = G_JUMP_TABLE %jump-table.2
+    %d:_(p0) = G_JUMP_TABLE %jump-table.3
+
+...
+
Index: llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
===================================================================
--- llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
+++ llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
@@ -72,6 +72,7 @@
       return MO.getOffset() | (MO.getTargetFlags() << 16);
     case MachineOperand::MO_FrameIndex:
     case MachineOperand::MO_ConstantPoolIndex:
+    case MachineOperand::MO_JumpTableIndex:
       return llvm::hash_value(MO);
 
     // We could explicitly handle all the types of the MachineOperand,
@@ -82,7 +83,6 @@
 
     // TODO: Handle the following Index/ID/Predicate cases. They can
     // be hashed on in a stable manner.
-    case MachineOperand::MO_JumpTableIndex:
     case MachineOperand::MO_CFIIndex:
     case MachineOperand::MO_IntrinsicID:
     case MachineOperand::MO_Predicate:


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