[PATCH] D78586: [MachineVerifier] Add more checks for registers in live-in lists.
Zhang Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 22 05:22:32 PDT 2020
ZhangKang added a comment.
I have seen below pattern:
dead renamable $x5 = MULHDU_rec killed renamable $x5, renamable $x4, implicit-def $cr0
...
BLR8 implicit $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5
BLR8 uses `implicit $x5`, but the ` $x5` is a dead reg. After using this patch, the MachineVerifier still don't give any error.
Above error is caused by the pass `virtregrewriter`. You can use below command to get above pattern:
llc llvm/llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll -mtriple=powerpc64-unknown-linux-gnu -stop-after=virtregrewriter -o stop-after.mir -verify-machineinstrs
Maybe we can more strict to check above case and give an error.
================
Comment at: llvm/lib/CodeGen/MachineVerifier.cpp:2451
+ // We don't track liveness for reserved registers.
+ if (isReserved(LiveInReg))
+ continue;
----------------
In the file `lib/CodeGen/LivePhysRegs.cpp`:
```
57 /// Add uses to the set.
58 void LivePhysRegs::addUses(const MachineInstr &MI) {
59 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
60 if (!MOP.isReg() || !MOP.readsReg())
61 continue;
62 addReg(MOP.getReg());
63 }
64 }
65
66 /// Simulates liveness when stepping backwards over an instruction(bundle):
67 /// Remove Defs, add uses. This is the recommended way of calculating liveness.
68 void LivePhysRegs::stepBackward(const MachineInstr &MI) {
69 // Remove defined registers and regmask kills from the set.
70 removeDefs(MI);
71
72 // Add uses to the set.
73 addUses(MI);
74 }
```
When we calculate the liveness by using the method `stepBackend`, we have added the reserved registers into the liveness in `addUses`, but here, we don't track the reserved registers. Are the `addUses` and the verification correct?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D78586/new/
https://reviews.llvm.org/D78586
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