[llvm] 67266d8 - [InstCombine] Negator: shufflevector is negatible

Roman Lebedev via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 22 05:18:58 PDT 2020


Author: Roman Lebedev
Date: 2020-04-22T15:14:23+03:00
New Revision: 67266d879c715cdcfb790acf0153da757dafd195

URL: https://github.com/llvm/llvm-project/commit/67266d879c715cdcfb790acf0153da757dafd195
DIFF: https://github.com/llvm/llvm-project/commit/67266d879c715cdcfb790acf0153da757dafd195.diff

LOG: [InstCombine] Negator: shufflevector is negatible

All these folds are correct as per alive-tv

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
    llvm/test/Transforms/InstCombine/sub-of-negatible.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp b/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
index 32f37c6d04cf..e119a383e9db 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
@@ -111,6 +111,10 @@ LLVM_NODISCARD Value *Negator::visit(Value *V, unsigned Depth) {
   ++NumValuesVisitedInThisNegator;
 #endif
 
+  // -(undef) -> undef.
+  if (match(V, m_Undef()))
+    return V;
+
   // In i1, negation can simply be ignored.
   if (V->getType()->isIntOrIntVectorTy(1))
     return V;
@@ -265,6 +269,18 @@ LLVM_NODISCARD Value *Negator::visit(Value *V, unsigned Depth) {
     return Builder.CreateSelect(I->getOperand(0), NegOp1, NegOp2,
                                 I->getName() + ".neg", /*MDFrom=*/I);
   }
+  case Instruction::ShuffleVector: {
+    // `shufflevector` is negatible if both operands are negatible.
+    ShuffleVectorInst *Shuf = cast<ShuffleVectorInst>(I);
+    Value *NegOp0 = visit(I->getOperand(0), Depth + 1);
+    if (!NegOp0) // Early return.
+      return nullptr;
+    Value *NegOp1 = visit(I->getOperand(1), Depth + 1);
+    if (!NegOp1)
+      return nullptr;
+    return Builder.CreateShuffleVector(NegOp0, NegOp1, Shuf->getShuffleMask(),
+                                       I->getName() + ".neg");
+  }
   case Instruction::Trunc: {
     // `trunc` is negatible if its operand is negatible.
     Value *NegOp = visit(I->getOperand(0), Depth + 1);

diff  --git a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll
index 21f695f40172..d676c0ba0936 100644
--- a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll
+++ b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll
@@ -625,9 +625,9 @@ define i8 @negate_zext_wrongwidth(i8 %x, i2 %y) {
 
 define <2 x i4> @negate_shufflevector_oneinput_reverse(<2 x i4> %x, <2 x i4> %y) {
 ; CHECK-LABEL: @negate_shufflevector_oneinput_reverse(
-; CHECK-NEXT:    [[T0:%.*]] = shl <2 x i4> <i4 -6, i4 5>, [[X:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> undef, <2 x i32> <i32 1, i32 0>
-; CHECK-NEXT:    [[T2:%.*]] = sub <2 x i4> [[Y:%.*]], [[T1]]
+; CHECK-NEXT:    [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]]
+; CHECK-NEXT:    [[T1_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> undef, <2 x i32> <i32 1, i32 0>
+; CHECK-NEXT:    [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y:%.*]]
 ; CHECK-NEXT:    ret <2 x i4> [[T2]]
 ;
   %t0 = shl <2 x i4> <i4 -6, i4 5>, %x
@@ -637,9 +637,9 @@ define <2 x i4> @negate_shufflevector_oneinput_reverse(<2 x i4> %x, <2 x i4> %y)
 }
 define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef(<2 x i4> %x, <2 x i4> %y) {
 ; CHECK-LABEL: @negate_shufflevector_oneinput_second_lane_is_undef(
-; CHECK-NEXT:    [[T0:%.*]] = shl <2 x i4> <i4 -6, i4 5>, [[X:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> undef, <2 x i32> <i32 0, i32 undef>
-; CHECK-NEXT:    [[T2:%.*]] = sub <2 x i4> [[Y:%.*]], [[T1]]
+; CHECK-NEXT:    [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]]
+; CHECK-NEXT:    [[T1_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> undef, <2 x i32> <i32 0, i32 undef>
+; CHECK-NEXT:    [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y:%.*]]
 ; CHECK-NEXT:    ret <2 x i4> [[T2]]
 ;
   %t0 = shl <2 x i4> <i4 -6, i4 5>, %x
@@ -649,10 +649,10 @@ define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef(<2 x i4> %x,
 }
 define <2 x i4> @negate_shufflevector_twoinputs(<2 x i4> %x, <2 x i4> %y, <2 x i4> %z) {
 ; CHECK-LABEL: @negate_shufflevector_twoinputs(
-; CHECK-NEXT:    [[T0:%.*]] = shl <2 x i4> <i4 -6, i4 5>, [[X:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <2 x i4> [[Y:%.*]], <i4 undef, i4 -1>
-; CHECK-NEXT:    [[T2:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> [[T1]], <2 x i32> <i32 0, i32 3>
-; CHECK-NEXT:    [[T3:%.*]] = sub <2 x i4> [[Z:%.*]], [[T2]]
+; CHECK-NEXT:    [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]]
+; CHECK-NEXT:    [[T1_NEG:%.*]] = add <2 x i4> [[Y:%.*]], <i4 undef, i4 1>
+; CHECK-NEXT:    [[T2_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> [[T1_NEG]], <2 x i32> <i32 0, i32 3>
+; CHECK-NEXT:    [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[Z:%.*]]
 ; CHECK-NEXT:    ret <2 x i4> [[T3]]
 ;
   %t0 = shl <2 x i4> <i4 -6, i4 5>, %x


        


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