[PATCH] D78608: [llvm] [CodeGen] Fixed vector halving bug for masked load

Tue Apr 21 23:12:36 PDT 2020

craig.topper added a comment.

In D78608#1996085 <https://reviews.llvm.org/D78608#1996085>, @aartbik wrote:

> In D78608#1996059 <https://reviews.llvm.org/D78608#1996059>, @craig.topper wrote:
>
> > I'm concerned that there might be a way to get HiMemVT to contain 0 elements. I think v17i32 would trigger it. We'd widen to v32i32, then split to v16i32 which will have a memvt of v1i32 and v16i32. Then we'll split the v16i32 pieces. And now we'll try to split that v1i32 memory vt.
>
>
> But do you agree this solution goes in the right direction?
>  Do you have any suggestions for the v17i32 case?
>  Happy to test that tomorrow and think about it some more.

I wonder if we should fix this in WidenVecRes_MLOAD by doing something closer to WidenVecRes_LOAD. Finding a legal type and slicing up the vector as we widen it.

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