[PATCH] D78587: [ARM] Always replace FP16 bitcasts with VMOVhr or VMOVrh

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:13002
 
-  SDValue Ops[] = {Copy->getOperand(0), Copy->getOperand(1)};
-  SDValue NewCopy = DCI.DAG.getNode(ISD::CopyFromReg, SDLoc(N), MVT::f16, Ops);
-  return NewCopy;
+  // Only the bottom 16 bits of the source regsiter are used.
+  APInt DemandedMask = APInt::getLowBitsSet(32, 16);
----------------
"register"


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  https://reviews.llvm.org/D78587/new/

https://reviews.llvm.org/D78587