[PATCH] D78570: [AMDGPU] Use RegClass helper functions in getRegForInlineAsmConstraint.
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 21 11:20:54 PDT 2020
rampitec added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10636
+ if (BitWidth == 1024) {
// v32 types are not legal but we support them here.
return std::make_pair(0U, RC);
----------------
This comment is obsolete. We do support v32* since then. You probably do not need special case for 1024 here.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78570/new/
https://reviews.llvm.org/D78570
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