[PATCH] D76929: [AArch64][SVE] Add SVE intrinsic for LD1RQ
Kerry McLaughlin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 21 10:15:03 PDT 2020
kmclaughlin added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11622
+ if (VT.isFloatingPoint())
+ Load = DAG.getNode(ISD::BITCAST, DL, VT, Load);
+
----------------
sdesmalen wrote:
> kmclaughlin wrote:
> > sdesmalen wrote:
> > > I'd expect this to then use `Load.getValue(0)` ?
> > I think this will have the same effect, as `Load` just returns a single value
> `SDValue LoadChain = SDValue(Load.getNode(), 1);` suggests that `Load` has two return values, the result of the load, and the Chain.
>
I think you're right - I've changed this to use the result of the load as suggested
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D76929/new/
https://reviews.llvm.org/D76929
More information about the llvm-commits
mailing list