[PATCH] D78570: [AMDGPU] Use RegClass helper functions in getRegForInlineAsmConstraint.

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
foad added reviewers: arsenm, rampitec, kerbowa.
Herald added subscribers: llvm-commits, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
foad marked an inline comment as done.
foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10597-10599
       case 64:
         RC = &AMDGPU::SGPR_64RegClass;
         break;
----------------
I don't like having exceptions like this, where we override the class that getSGPRClassForBitWidth would return. There are similar things in e.g. SIRegisterInfo::getEquivalentSGPRClass.

Perhaps getSGPRClassForBitWidth et al should be split into two different helpers, "get allocatable class" and "get *something else* class". But I really don't understand the purpose and the naming of the SReg/VReg/AReg vs SGPR/VGPR/AGPR classes, so I'm not sure how to do that.


This avoids more long lists of register classes that have to be updated
every time we add a new one. NFC.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78570

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D78570.259024.patch
Type: text/x-patch
Size: 3100 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200421/018f1f74/attachment.bin>