[PATCH] D78380: Let the target adjust physical output- and anti-deps
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 21 05:54:52 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc3a292961d84: Let targets adjust physical output- and anti-deps (authored by frasercrmck).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78380/new/
https://reviews.llvm.org/D78380
Files:
llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
Index: llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
===================================================================
--- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -294,6 +294,8 @@
if (MRI.isConstantPhysReg(Reg))
return;
+ const TargetSubtargetInfo &ST = MF.getSubtarget();
+
// Optionally add output and anti dependencies. For anti
// dependencies we use a latency of 0 because for a multi-issue
// target we want to allow the defining instruction to issue
@@ -311,14 +313,12 @@
if (DefSU != SU &&
(Kind != SDep::Output || !MO.isDead() ||
!DefSU->getInstr()->registerDefIsDead(*Alias))) {
- if (Kind == SDep::Anti)
- DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias));
- else {
- SDep Dep(SU, Kind, /*Reg=*/*Alias);
+ SDep Dep(SU, Kind, /*Reg=*/*Alias);
+ if (Kind != SDep::Anti)
Dep.setLatency(
SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
- DefSU->addPred(Dep);
- }
+ ST.adjustSchedDependency(SU, OperIdx, DefSU, I->OpIdx, Dep);
+ DefSU->addPred(Dep);
}
}
}
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