[PATCH] D78272: [PowerPC] DAG Combine to transform shifts into multiply-high
Anil Mahmud via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 20 21:40:58 PDT 2020
anil9 added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15849
+// (sra (mul (sext i32:$a to i64), (sext i32:$a to i64)), 32) -> (mulhs $a, $b)
+static SDValue combineShifttoMULH(SDNode *N, SelectionDAG &DAG,
+ const TargetLowering &TLI,
----------------
niit: combineShifttoMULH -> combineShiftToMULH
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78272/new/
https://reviews.llvm.org/D78272
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