[PATCH] D78529: [ARM] Fix MIR tests with invalid live-ins.

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
efriedma added reviewers: dmgreen, samparker.
Herald added subscribers: danielkiss, kristof.beyls.
Herald added a project: LLVM.

A register can't be live if it isn't defined; fix issues in various testcases.

(I'm working on a MachineVerifier patch to verify this.)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78529

Files:
  llvm/test/CodeGen/ARM/constant-islands-split-IT.mir
  llvm/test/CodeGen/ARM/ifcvt-size.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-chain.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-prev-iteration.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/safe-def-no-mov.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-use-after.mir
  llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-ctrl-flow.mir

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