[PATCH] D77906: [SVE] Remove calls to getBitWidth from mips
Christopher Tetreault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 20 14:39:16 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rG17e1df44ec67: [SVE] Remove calls to getBitWidth from mips (authored by ctetreau).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77906/new/
https://reviews.llvm.org/D77906
Files:
llvm/lib/Target/Mips/MipsISelLowering.cpp
Index: llvm/lib/Target/Mips/MipsISelLowering.cpp
===================================================================
--- llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -3948,7 +3948,7 @@
break;
case 'f': // FPU or MSA register
if (Subtarget.hasMSA() && type->isVectorTy() &&
- cast<VectorType>(type)->getBitWidth() == 128)
+ type->getPrimitiveSizeInBits().getFixedSize() == 128)
weight = CW_Register;
else if (type->isFloatTy())
weight = CW_Register;
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D77906.258845.patch
Type: text/x-patch
Size: 541 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200420/64d53316/attachment.bin>
More information about the llvm-commits
mailing list