[llvm] 17e1df4 - [SVE] Remove calls to getBitWidth from mips
Christopher Tetreault via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 20 14:09:22 PDT 2020
Author: Christopher Tetreault
Date: 2020-04-20T14:09:06-07:00
New Revision: 17e1df44ec672654a5900b566d0010625c5fc3a2
URL: https://github.com/llvm/llvm-project/commit/17e1df44ec672654a5900b566d0010625c5fc3a2
DIFF: https://github.com/llvm/llvm-project/commit/17e1df44ec672654a5900b566d0010625c5fc3a2.diff
LOG: [SVE] Remove calls to getBitWidth from mips
Reviewers: efriedma, ahatanak, sdesmalen, c-rhodes, david-arm
Reviewed By: efriedma
Subscribers: dexonsmith, sdardis, arichardson, tschuett, hiraditya, jrtc27, atanasyan, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D77906
Added:
Modified:
llvm/lib/Target/Mips/MipsISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 7a89ac285f4f..d305c1c7f388 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -3948,7 +3948,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight(
break;
case 'f': // FPU or MSA register
if (Subtarget.hasMSA() && type->isVectorTy() &&
- cast<VectorType>(type)->getBitWidth() == 128)
+ type->getPrimitiveSizeInBits().getFixedSize() == 128)
weight = CW_Register;
else if (type->isFloatTy())
weight = CW_Register;
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