[llvm] 0098324 - [AIX] Return the correct set of callee saved regs

[David Tenty via llvm-commits]

Author: David Tenty
Date: 2020-04-20T14:31:08-04:00
New Revision: 009832494797c8f63a2f78fc653e3f610c4ca54f

URL: https://github.com/llvm/llvm-project/commit/009832494797c8f63a2f78fc653e3f610c4ca54f
DIFF: https://github.com/llvm/llvm-project/commit/009832494797c8f63a2f78fc653e3f610c4ca54f.diff

LOG: [AIX] Return the correct set of callee saved regs

Summary:
r13 isn't reserved on 32-bit AIX, which is reflected in our calling
convention but not callee saved regs.

Reviewers: sfertile, ZarkoCA, cebowleratibm, jasonliu

Reviewed By: sfertile

Subscribers: thakis, lei, wuzish, nemanjai, hiraditya, kbarton, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77101

Added: 
    llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll

Modified: 
    llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index ae1aa66acc3a..3a1d124a0d9d 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -142,6 +142,8 @@ const MCPhysReg*
 PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
   const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
   if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) {
+    if (!TM.isPPC64() && Subtarget.isAIXABI())
+      report_fatal_error("AnyReg unimplemented on 32-bit AIX.");
     if (Subtarget.hasVSX())
       return CSR_64_AllRegs_VSX_SaveList;
     if (Subtarget.hasAltivec())
@@ -149,8 +151,11 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
     return CSR_64_AllRegs_SaveList;
   }
 
-  if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR())
+  if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR()) {
+    if (Subtarget.isAIXABI())
+      report_fatal_error("SplitCSR unimplemented on AIX.");
     return CSR_SRV464_TLS_PE_SaveList;
+  }
 
   // On PPC64, we might need to save r2 (but only if it is not reserved).
   // We do not need to treat R2 as callee-saved when using PC-Relative calls
@@ -164,6 +169,8 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
 
   // Cold calling convention CSRs.
   if (MF->getFunction().getCallingConv() == CallingConv::Cold) {
+    if (Subtarget.isAIXABI())
+      report_fatal_error("Cold calling unimplemented on AIX.");
     if (TM.isPPC64()) {
       if (Subtarget.hasAltivec())
         return SaveR2 ? CSR_SVR64_ColdCC_R2_Altivec_SaveList
@@ -186,6 +193,8 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
     return SaveR2 ? CSR_PPC64_R2_SaveList : CSR_PPC64_SaveList;
   }
   // 32-bit targets.
+  if (Subtarget.isAIXABI())
+    return CSR_AIX32_SaveList;
   if (Subtarget.hasAltivec())
     return CSR_SVR432_Altivec_SaveList;
   else if (Subtarget.hasSPE())

diff  --git a/llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll b/llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll
new file mode 100644
index 000000000000..e0826b503129
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll
@@ -0,0 +1,11 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
+; RUN:  -mtriple powerpc-ibm-aix-xcoff -O0 < %s | \
+; RUN: FileCheck --check-prefixes=CHECK %s
+
+define void @usethirteen() {
+    call void asm "nop", "~{r13}"()
+    ret void
+}
+
+; CHECK: stw 13, -4(1)
+; CHECK: lwz 13, -4(1)