[PATCH] D78352: [MLIR] Add GenericAtomicRMWOp.
Mehdi AMINI via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 20 09:10:43 PDT 2020
mehdi_amini added inline comments.
================
Comment at: mlir/include/mlir/Dialect/StandardOps/IR/Ops.td:502
+ that represents the value stored in `memref[indices]` before the write is
+ performed.
+
----------------
We should mention that no side effecting operation is allowed in the region.
================
Comment at: mlir/include/mlir/Dialect/StandardOps/IR/Ops.td:536
+ return OpBuilder(&block, block.end());
+ }
+ // The value stored in memref[ivs].
----------------
This is the kind of method I expect provided by a Traits otherwise we're losing consistency across all operations with regions.
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https://reviews.llvm.org/D78352/new/
https://reviews.llvm.org/D78352
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