[PATCH] D77874: [AArch32] Armv8.6a Matrix Mul Assembly

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham added a comment.

I see. In that case I suppose the simplest thing to do is just to explain that in the commit message, along the lines of "D77872 <https://reviews.llvm.org/D77872> has already added the MC representations of the instructions so that they can be used in code gen; this patch fills in the details needed to make assembly parsing work, and adds tests for asm and disasm'.



================
Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:6336
+      Mnemonic == "vusmmla" || Mnemonic == "vsudot" ||
+      Mnemonic == "vusdot")
     return Mnemonic;
----------------
Now I look closely, I'm slightly confused about why all of these instructions needed to be added to this if statement. I thought this if statement was supposed to be a list of exceptions to the general rule that a mnemonic ending in a known condition-code string like "eq" or "ne" or "lt" should be broken up into a shorter mnemonic and a conditional suffix. Hence, for example, "wls" is on the list so that it doesn't get misparsed as "w" with condition "ls".

Mind you, I'm also slightly confused about what some of the existing mnemonics in this list are here for. But what specific thing fails if you remove this hunk of the diff?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77874/new/

https://reviews.llvm.org/D77874