[PATCH] D77387: [ARM] Fix conditions for lowering to S[LR]I

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 19 14:57:38 PDT 2020


efriedma added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll:5
 ; CHECK-LABEL: testLeftGood:
 ; CHECK: sli.16b v0, v1, #3
+  %and.i = and <16 x i8> %src1, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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Please generate simple tests like this with update_llc_test_checks.py.

This transform is simply wrong, as written: sli is not the vector version of bfi.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77387/new/

https://reviews.llvm.org/D77387





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