[PATCH] D78440: [PowerPC] Fix the liveins for ppc-early-ret pass

[Zhang Kang via Phabricator via llvm-commits]

ZhangKang created this revision.
ZhangKang added reviewers: jsji, nemanjai, hfinkel, steven.zhang, efriedma.
ZhangKang added a project: LLVM.
Herald added subscribers: shchenz, wuzish, hiraditya.
ZhangKang edited the summary of this revision.

The pass `ppc-early-ret` doesn't update the liveins after doing early return. It will cause assertion error when enable `verify-machineinstrs`.

Fo below mir:

  bb.2:
    successors: %bb.3(0x80000000)
    liveins: $zero8
  
    renamable $x5 = ADDI8 $zero8, 0
  
  bb.3:
    liveins: $x3, $x4, $x5
  
    BLR8 implicit $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5

After doing ppc-early-ret, we will get:

  bb.2:
    liveins: $zero8
  
    renamable $x5 = ADDI8 $zero8, 0
    BLR8 implicit $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5

Above result will cause assertion error: `Using an undefined physical register`, because we have use undef `$x3, $x4, $x5` in bb.2.

The right result should be:

  bb.2:
    liveins: $zero8, $x3, $x4, $x5
  
    renamable $x5 = ADDI8 $zero8, 0
    BLR8 implicit $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5

This patch is to fix the liveins for ppc-early-ret pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78440

Files:
  llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
  llvm/test/CodeGen/PowerPC/early-ret-liveness.mir

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