[PATCH] D78364: [MC][Bugfix] Remove redundant parameter for relaxInstruction

Kan Shengchen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 17 06:59:25 PDT 2020


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Before this patch, `relaxInstruction` takes three arguments, the first
argument refers to the instruction before relaxation and the third
argument is the output instruction after relaxation. There are two quite
strange things:

1. The first argument's type is `const MCInst &`, the third argument's type is `MCInst &`, but they may be aliased to the same variable
2. The backends of ARM, AMDGPU, RISC-V, Hexagon assume that the third argument is a fresh uninitialized `MCInst` even if `relaxInstruction` may be called like `relaxInstruction(Relaxed, STI, Relaxed)` in a loop.

In this patch, we drop the thrid argument, and let `relaxInstruction`
directly modify the given instruction. Also, this patch fixes the bug
introduced by D77851 <https://reviews.llvm.org/D77851>, which breaks the assumption of ARM, AMDGPU, RISC-V,
Hexagon.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78364

Files:
  llvm/include/llvm/MC/MCAsmBackend.h
  llvm/lib/MC/MCAssembler.cpp
  llvm/lib/MC/MCObjectStreamer.cpp
  llvm/lib/MCA/CodeEmitter.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
  llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
  llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
  llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
  llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
  llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
  llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
  llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
  llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
  llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

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