[lld] 87383e4 - [ELF][ARM] Increase default max-page-size from 4096 to 6536
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 18 08:20:19 PDT 2020
Author: Tobias Hieta
Date: 2020-04-18T08:19:45-07:00
New Revision: 87383e408d41623ada41e2bbc371b037fa29e894
URL: https://github.com/llvm/llvm-project/commit/87383e408d41623ada41e2bbc371b037fa29e894
DIFF: https://github.com/llvm/llvm-project/commit/87383e408d41623ada41e2bbc371b037fa29e894.diff
LOG: [ELF][ARM] Increase default max-page-size from 4096 to 6536
See http://lists.llvm.org/pipermail/llvm-dev/2020-April/140549.html
For the record, GNU ld changed to 64k max page size in 2014
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=7572ca8989ead4c3425a1500bc241eaaeffa2c89
"[RFC] ld/ARM: Increase maximum page size to 64kB"
Android driver forced 4k page size in AArch64 (D55029) and ARM (D77746).
A binary linked with max-page-size=4096 does not run on a system with a
higher page size configured. There are some systems out there that do
this and it leads to the binary getting `Killed!` by the kernel.
In the non-linker-script cases, when linked with -z noseparate-code
(default), the max-page-size increase should not cause any size
difference. There may be some VMA usage differences, though.
Reviewed By: psmith, MaskRay
Differential Revision: https://reviews.llvm.org/D77330
Added:
Modified:
lld/ELF/Arch/ARM.cpp
lld/test/ELF/Inputs/far-arm-abs.s
lld/test/ELF/Inputs/far-long-arm-abs.s
lld/test/ELF/arm-abs32-dyn.s
lld/test/ELF/arm-adr.s
lld/test/ELF/arm-bl-v6.s
lld/test/ELF/arm-branch-rangethunk.s
lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
lld/test/ELF/arm-branch.s
lld/test/ELF/arm-copy.s
lld/test/ELF/arm-execute-only.s
lld/test/ELF/arm-exidx-add-missing.s
lld/test/ELF/arm-exidx-canunwind.s
lld/test/ELF/arm-exidx-dedup.s
lld/test/ELF/arm-exidx-emit-relocs.s
lld/test/ELF/arm-exidx-gc.s
lld/test/ELF/arm-exidx-order.s
lld/test/ELF/arm-exidx-shared.s
lld/test/ELF/arm-fix-cortex-a8-blx.s
lld/test/ELF/arm-fix-cortex-a8-nopatch.s
lld/test/ELF/arm-fix-cortex-a8-recognize.s
lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
lld/test/ELF/arm-fpic-got.s
lld/test/ELF/arm-gnu-ifunc-plt.s
lld/test/ELF/arm-gnu-ifunc.s
lld/test/ELF/arm-got-relative.s
lld/test/ELF/arm-gotoff.s
lld/test/ELF/arm-icf-exidx.s
lld/test/ELF/arm-mov-relocs.s
lld/test/ELF/arm-pie-relative.s
lld/test/ELF/arm-plt-reloc.s
lld/test/ELF/arm-sbrel32.s
lld/test/ELF/arm-target1.s
lld/test/ELF/arm-target2.s
lld/test/ELF/arm-thumb-adr.s
lld/test/ELF/arm-thumb-interwork-abs.s
lld/test/ELF/arm-thumb-interwork-notfunc.s
lld/test/ELF/arm-thumb-interwork-shared.s
lld/test/ELF/arm-thumb-interwork-thunk-v5.s
lld/test/ELF/arm-thumb-ldrlit.s
lld/test/ELF/arm-thumb-no-undefined-thunk.s
lld/test/ELF/arm-thumb-plt-range-thunk-os.s
lld/test/ELF/arm-thumb-plt-reloc.s
lld/test/ELF/arm-thumb-thunk-empty-pass.s
lld/test/ELF/arm-thumb-thunk-symbols.s
lld/test/ELF/arm-thumb-undefined-weak.s
lld/test/ELF/arm-thunk-largesection.s
lld/test/ELF/arm-thunk-multipass-plt.s
lld/test/ELF/arm-thunk-nosuitable.s
lld/test/ELF/arm-thunk-re-add.s
lld/test/ELF/arm-tls-gd-nonpreemptible.s
lld/test/ELF/arm-tls-gd32.s
lld/test/ELF/arm-tls-ie32.s
lld/test/ELF/arm-tls-ldm32.s
lld/test/ELF/arm-tls-le32.s
lld/test/ELF/arm-tls-norelax-gd-ie.s
lld/test/ELF/arm-tls-norelax-gd-le.s
lld/test/ELF/arm-tls-norelax-ie-le.s
lld/test/ELF/arm-tls-norelax-ld-le.s
lld/test/ELF/arm-undefined-weak.s
lld/test/ELF/global-offset-table-position-arm.s
lld/test/ELF/pack-dyn-relocs-arm2.s
lld/test/ELF/pack-dyn-relocs.s
Removed:
################################################################################
diff --git a/lld/ELF/Arch/ARM.cpp b/lld/ELF/Arch/ARM.cpp
index e353bbf40d8f..195f7936f5d3 100644
--- a/lld/ELF/Arch/ARM.cpp
+++ b/lld/ELF/Arch/ARM.cpp
@@ -65,6 +65,7 @@ ARM::ARM() {
ipltEntrySize = 16;
trapInstr = {0xd4, 0xd4, 0xd4, 0xd4};
needsThunks = true;
+ defaultMaxPageSize = 65536;
}
uint32_t ARM::calcEFlags() const {
diff --git a/lld/test/ELF/Inputs/far-arm-abs.s b/lld/test/ELF/Inputs/far-arm-abs.s
index 68d6aabe00b8..47882592029e 100644
--- a/lld/test/ELF/Inputs/far-arm-abs.s
+++ b/lld/test/ELF/Inputs/far-arm-abs.s
@@ -1,13 +1,13 @@
.global far
.type far,%function
-far = 0x201001c
+far = 0x202001c
.global too_far1
.type too_far1,%function
-too_far1 = 0x2020008
+too_far1 = 0x2030008
.global too_far2
.type too_far2,%function
-too_far2 = 0x202000c
+too_far2 = 0x203000c
.global too_far3
.type too_far3,%function
-too_far3 = 0x2020010
+too_far3 = 0x2030010
diff --git a/lld/test/ELF/Inputs/far-long-arm-abs.s b/lld/test/ELF/Inputs/far-long-arm-abs.s
index 10d9d0292eab..61c11e6690c8 100644
--- a/lld/test/ELF/Inputs/far-long-arm-abs.s
+++ b/lld/test/ELF/Inputs/far-long-arm-abs.s
@@ -1,13 +1,13 @@
.global far
.type far,%function
-far = 0x201001c
+far = 0x202001c
.global too_far1
.type too_far1,%function
-too_far1 = 0x2020014
+too_far1 = 0x2030014
.global too_far2
.type too_far2,%function
-too_far2 = 0x2020020
+too_far2 = 0x2030020
.global too_far3
.type too_far3,%function
-too_far3 = 0x202002c
+too_far3 = 0x203002c
\ No newline at end of file
diff --git a/lld/test/ELF/arm-abs32-dyn.s b/lld/test/ELF/arm-abs32-dyn.s
index 97870accf75c..5d4aae71d003 100644
--- a/lld/test/ELF/arm-abs32-dyn.s
+++ b/lld/test/ELF/arm-abs32-dyn.s
@@ -1,8 +1,8 @@
// REQUIRES: arm
// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux %s -o %t.o
-// Creates a R_ARM_ABS32 relocation against foo and bar, bar has hidden
-// visibility so we expect a R_ARM_RELATIVE
+/// Creates a R_ARM_ABS32 relocation against foo and bar, bar has hidden
+/// visibility so we expect a R_ARM_RELATIVE
.syntax unified
.globl foo
foo:
@@ -14,9 +14,9 @@ bar:
.word foo
.word bar
-// In PIC mode, if R_ARM_TARGET1 represents R_ARM_ABS32 (the default), an
-// R_ARM_TARGET1 to a non-preemptable symbol also creates an R_ARM_RELATIVE in
-// a writable section.
+/// In PIC mode, if R_ARM_TARGET1 represents R_ARM_ABS32 (the default), an
+/// R_ARM_TARGET1 to a non-preemptable symbol also creates an R_ARM_RELATIVE in
+/// a writable section.
.word bar(target1)
// RUN: ld.lld -shared -o %t.so %t.o
@@ -24,18 +24,18 @@ bar:
// RUN: llvm-readelf -x .data %t.so | FileCheck --check-prefix=HEX %s
// CHECK: Dynamic Relocations {
-// CHECK-NEXT: 0x3204 R_ARM_RELATIVE
-// CHECK-NEXT: 0x3208 R_ARM_RELATIVE
-// CHECK-NEXT: 0x3200 R_ARM_ABS32 foo 0x0
+// CHECK-NEXT: 0x30204 R_ARM_RELATIVE
+// CHECK-NEXT: 0x30208 R_ARM_RELATIVE
+// CHECK-NEXT: 0x30200 R_ARM_ABS32 foo 0x0
// CHECK-NEXT: }
// CHECK: Symbols [
// CHECK: Symbol {
// CHECK: Name: bar
-// CHECK-NEXT: Value: 0x11A8
+// CHECK-NEXT: Value: 0x101A8
// CHECK: Symbol {
// CHECK: Name: foo
-// CHECK-NEXT: Value: 0x11A8
+// CHECK-NEXT: Value: 0x101A8
-// HEX: 0x00003200 00000000 a8110000 a8110000
+// HEX: 0x00030200 00000000 a8010100 a8010100
diff --git a/lld/test/ELF/arm-adr.s b/lld/test/ELF/arm-adr.s
index 383a3cad3015..1fb8505f71f5 100644
--- a/lld/test/ELF/arm-adr.s
+++ b/lld/test/ELF/arm-adr.s
@@ -75,37 +75,37 @@ arm_func:
afunc:
bx lr
-// CHECK: 00011410 <dat1>:
-// CHECK-NEXT: 11410: andeq r0, r0, r0
-
-// CHECK: 00011414 <dat2>:
-// CHECK-NEXT: 11414: andeq r0, r0, r0
-
-// CHECK: 00011800 <_start>:
-/// 0x11800 + 0x8 - 0x3f8 = 0x11410 = dat1
-// CHECK-NEXT: 11800: sub r0, pc, #1016
-/// 0x11804 + 0x8 - 0x3f8 = 0x11414 = dat2
-// CHECK-NEXT: 11804: sub r0, pc, #1016
-/// 0x11808 + 0x8 + 0x400 = 0x11c10 = dat3
-// CHECK-NEXT: 11808: add r0, pc, #1024
-/// 0x1180c + 0x8 + 0x400 = 0x11c14 = dat4
-// CHECK-NEXT: 1180c: add r0, pc, #1024
-
-// CHECK: 00011c10 <dat3>:
-// CHECK-NEXT: 11c10: andeq r0, r0, r0
-
-// CHECK: 00011c14 <dat4>:
-// CHECK-NEXT: 11c14: andeq r0, r0, r0
-
-// CHECK: 00011c18 <tfunc>:
-// CHECK-NEXT: 11c18: bx lr
-
-// CHECK: 00011c1c <arm_func>:
-/// 0x11c1c + 0x8 - 0xb = 11c19 = tfunc
-// CHECK-NEXT: 11c1c: sub r0, pc, #11
-/// 0x11c20 + 0x8 = 0x11c28 = afunc
-// CHECK-NEXT: 11c20: add r0, pc, #0
-// CHECK-NEXT: 11c24: bx lr
-
-// CHECK: 00011c28 <afunc>:
-// CHECK-NEXT: 11c28: bx lr
+// CHECK: 00020410 <dat1>:
+// CHECK-NEXT: 20410: andeq r0, r0, r0
+
+// CHECK: 00020414 <dat2>:
+// CHECK-NEXT: 20414: andeq r0, r0, r0
+
+// CHECK: 00020800 <_start>:
+/// 0x20800 + 0x8 - 0x3f8 = 0x11410 = dat1
+// CHECK-NEXT: 20800: sub r0, pc, #1016
+/// 0x20804 + 0x8 - 0x3f8 = 0x11414 = dat2
+// CHECK-NEXT: 20804: sub r0, pc, #1016
+/// 0x20808 + 0x8 + 0x400 = 0x11c10 = dat3
+// CHECK-NEXT: 20808: add r0, pc, #1024
+/// 0x2080c + 0x8 + 0x400 = 0x11c14 = dat4
+// CHECK-NEXT: 2080c: add r0, pc, #1024
+
+// CHECK: 00020c10 <dat3>:
+// CHECK-NEXT: 20c10: andeq r0, r0, r0
+
+// CHECK: 00020c14 <dat4>:
+// CHECK-NEXT: 20c14: andeq r0, r0, r0
+
+// CHECK: 00020c18 <tfunc>:
+// CHECK-NEXT: 20c18: bx lr
+
+// CHECK: 00020c1c <arm_func>:
+/// 0x20c1c + 0x8 - 0xb = 11c19 = tfunc
+// CHECK-NEXT: 20c1c: sub r0, pc, #11
+/// 0x20c20 + 0x8 = 0x11c28 = afunc
+// CHECK-NEXT: 20c20: add r0, pc, #0
+// CHECK-NEXT: 20c24: bx lr
+
+// CHECK: 00020c28 <afunc>:
+// CHECK-NEXT: 20c28: bx lr
diff --git a/lld/test/ELF/arm-bl-v6.s b/lld/test/ELF/arm-bl-v6.s
index 353ec5629647..e8b2668a74cd 100644
--- a/lld/test/ELF/arm-bl-v6.s
+++ b/lld/test/ELF/arm-bl-v6.s
@@ -1,19 +1,19 @@
// REQUIRES: arm
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv6-none-linux-gnueabi %s -o %t
// RUN: ld.lld %t -o %t2
-// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x12000 --stop-address=0x12008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s
-// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x12008 --stop-address=0x1200c | FileCheck --check-prefix=CHECK-THUMB1 %s
-// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x21200c --stop-address=0x212014 %t2 | FileCheck --check-prefix=CHECK-ARM2 %s
-// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x613000 --stop-address=0x613002 | FileCheck --check-prefix=CHECK-THUMB2 %s
+// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x21000 --stop-address=0x21008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s
+// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x21008 --stop-address=0x2100c | FileCheck --check-prefix=CHECK-THUMB1 %s
+// RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi --start-address=0x22100c --stop-address=0x221014 %t2 | FileCheck --check-prefix=CHECK-ARM2 %s
+// RUN: llvm-objdump -d --triple=thumbv6-none-linux-gnueabi %t2 --start-address=0x622000 --stop-address=0x622002 | FileCheck --check-prefix=CHECK-THUMB2 %s
-// On Arm v6 the range of a Thumb BL instruction is only 4 megabytes as the
-// extended range encoding is not supported. The following example has a Thumb
-// BL that is out of range on ARM v6 and requires a range extension thunk.
-// As v6 does not support MOVT or MOVW instructions the Thunk must not
-// use these instructions either.
+/// On Arm v6 the range of a Thumb BL instruction is only 4 megabytes as the
+/// extended range encoding is not supported. The following example has a Thumb
+/// BL that is out of range on ARM v6 and requires a range extension thunk.
+/// As v6 does not support MOVT or MOVW instructions the Thunk must not
+/// use these instructions either.
-// ARM v6 supports blx so we shouldn't see the blx not supported warning.
+/// ARM v6 supports blx so we shouldn't see the blx not supported warning.
// CHECK-NOT: warning: lld uses blx instruction, no object with architecture supporting feature detected.
.text
.syntax unified
@@ -28,8 +28,8 @@ _start:
// CHECK-ARM1: Disassembly of section .text:
// CHECK-ARM1-EMPTY:
// CHECK-ARM1-NEXT: <_start>:
-// CHECK-ARM1-NEXT: 12000: 00 00 00 fa blx #0 <thumbfunc>
-// CHECK-ARM1-NEXT: 12004: 1e ff 2f e1 bx lr
+// CHECK-ARM1-NEXT: 21000: 00 00 00 fa blx #0 <thumbfunc>
+// CHECK-ARM1-NEXT: 21004: 1e ff 2f e1 bx lr
.thumb
.section .text.2, "ax", %progbits
.globl thumbfunc
@@ -38,16 +38,16 @@ thumbfunc:
bl farthumbfunc
// CHECK-THUMB1: <thumbfunc>:
-// CHECK-THUMB1-NEXT: 12008: 00 f2 00 e8 blx #2097152
-// 6 Megabytes, enough to make farthumbfunc out of range of caller
-// on a v6 Arm, but not on a v7 Arm.
+// CHECK-THUMB1-NEXT: 21008: 00 f2 00 e8 blx #2097152
+/// 6 Megabytes, enough to make farthumbfunc out of range of caller
+/// on a v6 Arm, but not on a v7 Arm.
.section .text.3, "ax", %progbits
.space 0x200000
// CHECK-ARM2: <__ARMv5ABSLongThunk_farthumbfunc>:
-// CHECK-ARM2-NEXT: 21200c: 04 f0 1f e5 ldr pc, [pc, #-4]
+// CHECK-ARM2-NEXT: 22100c: 04 f0 1f e5 ldr pc, [pc, #-4]
// CHECK-ARM2: <$d>:
-// CHECK-ARM2-NEXT: 212010: 01 30 61 00 .word 0x00613001
+// CHECK-ARM2-NEXT: 221010: 01 20 62 00 .word 0x00622001
.section .text.4, "ax", %progbits
.space 0x200000
@@ -62,4 +62,4 @@ thumbfunc:
farthumbfunc:
bx lr
// CHECK-THUMB2: <farthumbfunc>:
-// CHECK-THUMB2-NEXT: 613000: 70 47 bx lr
+// CHECK-THUMB2-NEXT: 622000: 70 47 bx lr
diff --git a/lld/test/ELF/arm-branch-rangethunk.s b/lld/test/ELF/arm-branch-rangethunk.s
index 81c0618871f4..7a208006e9c5 100644
--- a/lld/test/ELF/arm-branch-rangethunk.s
+++ b/lld/test/ELF/arm-branch-rangethunk.s
@@ -2,50 +2,46 @@
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %S/Inputs/far-arm-abs.s -o %tfar
// RUN: ld.lld %t %tfar -o %t2
-// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=SHORT %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=SHORT %s
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %S/Inputs/far-long-arm-abs.s -o %tfarlong
// RUN: ld.lld %t %tfarlong -o %t3
-// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=LONG %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=LONG %s
.syntax unified
.section .text, "ax",%progbits
.globl _start
.balign 0x10000
.type _start,%function
_start:
- // address of too_far symbols are just out of range of ARM branch with
- // 26-bit immediate field and an addend of -8
+ /// address of too_far symbols are just out of range of ARM branch with
+ /// 26-bit immediate field and an addend of -8
bl too_far1
b too_far2
beq too_far3
-// SHORT: Disassembly of section .text:
-// SHORT-EMPTY:
-// SHORT-NEXT: <_start>:
-// SHORT-NEXT: 20000: 01 00 00 eb bl #4 <__ARMv7ABSLongThunk_too_far1>
-// SHORT-NEXT: 20004: 01 00 00 ea b #4 <__ARMv7ABSLongThunk_too_far2>
-// SHORT-NEXT: 20008: 01 00 00 0a beq #4 <__ARMv7ABSLongThunk_too_far3>
-// SHORT: <__ARMv7ABSLongThunk_too_far1>:
-// SHORT-NEXT: 2000c: fd ff 7f ea b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff4>
-// SHORT: <__ARMv7ABSLongThunk_too_far2>:
-// SHORT-NEXT: 20010: fd ff 7f ea b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff8>
-// SHORT: <__ARMv7ABSLongThunk_too_far3>:
-// SHORT-NEXT: 20014: fd ff 7f ea b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffffc>
+// SHORT: 00030000 <_start>:
+// SHORT-NEXT: 30000: bl #4 <__ARMv7ABSLongThunk_too_far1>
+// SHORT-NEXT: 30004: b #4 <__ARMv7ABSLongThunk_too_far2>
+// SHORT-NEXT: 30008: beq #4 <__ARMv7ABSLongThunk_too_far3>
+// SHORT: 0003000c <__ARMv7ABSLongThunk_too_far1>:
+// SHORT-NEXT: 3000c: b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff4>
+// SHORT: 00030010 <__ARMv7ABSLongThunk_too_far2>:
+// SHORT-NEXT: 30010: b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff8>
+// SHORT: 00030014 <__ARMv7ABSLongThunk_too_far3>:
+// SHORT-NEXT: 30014: b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffffc>
-// LONG: Disassembly of section .text:
-// LONG-EMPTY:
-// LONG-NEXT: <_start>:
-// LONG-NEXT: 20000: 01 00 00 eb bl #4 <__ARMv7ABSLongThunk_too_far1>
-// LONG-NEXT: 20004: 03 00 00 ea b #12 <__ARMv7ABSLongThunk_too_far2>
-// LONG-NEXT: 20008: 05 00 00 0a beq #20 <__ARMv7ABSLongThunk_too_far3>
-// LONG: <__ARMv7ABSLongThunk_too_far1>:
-// LONG-NEXT: 2000c: 14 c0 00 e3 movw r12, #20
-// LONG-NEXT: 20010: 02 c2 40 e3 movt r12, #514
-// LONG-NEXT: 20014: 1c ff 2f e1 bx r12
-// LONG: <__ARMv7ABSLongThunk_too_far2>:
-// LONG-NEXT: 20018: 20 c0 00 e3 movw r12, #32
-// LONG-NEXT: 2001c: 02 c2 40 e3 movt r12, #514
-// LONG-NEXT: 20020: 1c ff 2f e1 bx r12
-// LONG: <__ARMv7ABSLongThunk_too_far3>:
-// LONG-NEXT: 20024: 2c c0 00 e3 movw r12, #44
-// LONG-NEXT: 20028: 02 c2 40 e3 movt r12, #514
-// LONG-NEXT: 2002c: 1c ff 2f e1 bx r12
+// LONG: 00030000 <_start>:
+// LONG-NEXT: 30000: bl #4 <__ARMv7ABSLongThunk_too_far1>
+// LONG-NEXT: 30004: b #12 <__ARMv7ABSLongThunk_too_far2>
+// LONG-NEXT: 30008: beq #20 <__ARMv7ABSLongThunk_too_far3>
+// LONG: 0003000c <__ARMv7ABSLongThunk_too_far1>:
+// LONG-NEXT: 3000c: movw r12, #20
+// LONG-NEXT: 30010: movt r12, #515
+// LONG-NEXT: 30014: bx r12
+// LONG: 00030018 <__ARMv7ABSLongThunk_too_far2>:
+// LONG-NEXT: 30018: movw r12, #32
+// LONG-NEXT: 3001c: movt r12, #515
+// LONG-NEXT: 30020: bx r12
+// LONG: 00030024 <__ARMv7ABSLongThunk_too_far3>:
+// LONG-NEXT: 30024: movw r12, #44
+// LONG-NEXT: 30028: movt r12, #515
+// LONG-NEXT: 3002c: bx r12
\ No newline at end of file
diff --git a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
index 9a4a41fd800b..1f6acd2ca521 100644
--- a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
+++ b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
@@ -3,10 +3,10 @@
// RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.o
// RUN: ld.lld %t.o %t1.so -o %t
-// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi --start-address=0x111e4 --stop-address=0x11204 %t | FileCheck %s
+// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi --start-address=0x201e4 --stop-address=0x20204 %t | FileCheck %s
-// When we are dynamic linking, undefined weak references have a PLT entry so
-// we must create a thunk for the branch to the PLT entry.
+/// When we are dynamic linking, undefined weak references have a PLT entry so
+/// we must create a thunk for the branch to the PLT entry.
.text
.globl bar2
@@ -16,21 +16,21 @@ _start:
.type _start, %function
b undefined_weak_we_expect_a_plt_entry_for
bl bar2
-// Create 32 Mb gap between the call to the weak reference and the PLT so that
-// the b and bl need a range-extension thunk.
+/// Create 32 Mb gap between the call to the weak reference and the PLT so that
+/// the b and bl need a range-extension thunk.
.section .text.1, "ax", %progbits
.space 32 * 1024 * 1024
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
-// CHECK-NEXT: 111e4: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
-// CHECK-NEXT: 111e8: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2>
+// CHECK-NEXT: 201e4: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
+// CHECK-NEXT: 201e8: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2>
// CHECK: <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>:
-// CHECK-NEXT: 111ec: 30 c2 01 e3 movw r12, #4656
-// CHECK-NEXT: 111f0: 01 c2 40 e3 movt r12, #513
-// CHECK-NEXT: 111f4: 1c ff 2f e1 bx r12
+// CHECK-NEXT: 201ec: 30 c2 00 e3 movw r12, #560
+// CHECK-NEXT: 201f0: 02 c2 40 e3 movt r12, #514
+// CHECK-NEXT: 201f4: 1c ff 2f e1 bx r12
// CHECK: <__ARMv7ABSLongThunk_bar2>:
-// CHECK-NEXT: 111f8: 40 c2 01 e3 movw r12, #4672
-// CHECK-NEXT: 111fc: 01 c2 40 e3 movt r12, #513
-// CHECK-NEXT: 11200: 1c ff 2f e1 bx r12
+// CHECK-NEXT: 201f8: 40 c2 00 e3 movw r12, #576
+// CHECK-NEXT: 201fc: 02 c2 40 e3 movt r12, #514
+// CHECK-NEXT: 20200: 1c ff 2f e1 bx r12
diff --git a/lld/test/ELF/arm-branch.s b/lld/test/ELF/arm-branch.s
index c2fab0571bcb..27d6313bd301 100644
--- a/lld/test/ELF/arm-branch.s
+++ b/lld/test/ELF/arm-branch.s
@@ -7,7 +7,7 @@
// RUN: .caller : { *(.text) } \
// RUN: .callee2 : { *(.callee_high) } } " > %t.script
// RUN: ld.lld --script %t.script %t %tfar -o %t2
-// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
.syntax unified
.section .callee_low, "ax",%progbits
.align 2
@@ -37,25 +37,23 @@ _start:
callee_high:
bx lr
-// CHECK: Disassembly of section .caller:
-// CHECK-EMPTY:
-// CHECK-NEXT: <_start>:
-// S(callee_low) = 0xb4 P = 0x10000 A = -8 = -0xff54 = -65364
-// CHECK-NEXT: 10000: 2b c0 ff eb bl #-65364 <callee_low>
-// S(callee_low) = 0xb4 P = 0x10004 A = -8 = -0xff58 = -65368
-// CHECK-NEXT: 10004: 2a c0 ff ea b #-65368 <callee_low>
-// S(callee_low) = 0xb4 P = 0x10008 A = -8 = -0xff5c -65372
-// CHECK-NEXT: 10008: 29 c0 ff 0a beq #-65372 <callee_low>
-// S(callee_high) = 0x10028 P = 0x1000c A = -8 = 0x14 = 20
-// CHECK-NEXT: 1000c: 05 00 00 eb bl #20 <callee_high>
-// S(callee_high) = 0x10028 P = 0x10010 A = -8 = 0x10 = 16
-// CHECK-NEXT: 10010: 04 00 00 ea b #16 <callee_high>
-// S(callee_high) = 0x10028 P = 0x10014 A = -8 = 0x0c =12
-// CHECK-NEXT: 10014: 03 00 00 1a bne #12 <callee_high>
-// S(far) = 0x201001c P = 0x10018 A = -8 = 0x1fffffc = 33554428
-// CHECK-NEXT: 10018: ff ff 7f eb bl #33554428
-// S(far) = 0x201001c P = 0x1001c A = -8 = 0x1fffff8 = 33554424
-// CHECK-NEXT: 1001c: fe ff 7f ea b #33554424
-// S(far) = 0x201001c P = 0x10020 A = -8 = 0x1fffff4 = 33554420
-// CHECK-NEXT: 10020: fd ff 7f ca bgt #33554420
-// CHECK-NEXT: 10024: 1e ff 2f e1 bx lr
+// CHECK: 00010000 <_start>:
+/// S(callee_low) = 0xb4 P = 0x10000 A = -8 = -0xff54 = -65364
+// CHECK-NEXT: 10000: bl #-65364 <callee_low>
+/// S(callee_low) = 0xb4 P = 0x10004 A = -8 = -0xff58 = -65368
+// CHECK-NEXT: 10004: b #-65368 <callee_low>
+/// S(callee_low) = 0xb4 P = 0x10008 A = -8 = -0xff5c -65372
+// CHECK-NEXT: 10008: beq #-65372 <callee_low>
+/// S(callee_high) = 0x10028 P = 0x1000c A = -8 = 0x14 = 20
+// CHECK-NEXT: 1000c: bl #28 <callee_high>
+/// S(callee_high) = 0x10028 P = 0x10010 A = -8 = 0x10 = 16
+// CHECK-NEXT: 10010: b #24 <callee_high>
+/// S(callee_high) = 0x10028 P = 0x10014 A = -8 = 0x0c =12
+// CHECK-NEXT: 10014: bne #20 <callee_high>
+/// S(far) = 0x201001c P = 0x10018 A = -8 = 0x1fffffc = 33554428
+// CHECK-NEXT: 10018: bl #8
+/// S(far) = 0x201001c P = 0x1001c A = -8 = 0x1fffff8 = 33554424
+// CHECK-NEXT: 1001c: b #4
+/// S(far) = 0x201001c P = 0x10020 A = -8 = 0x1fffff4 = 33554420
+// CHECK-NEXT: 10020: bgt #0
+// CHECK-NEXT: 10024: bx lr
diff --git a/lld/test/ELF/arm-copy.s b/lld/test/ELF/arm-copy.s
index afdfb9f93dbd..7cbc1cfde239 100644
--- a/lld/test/ELF/arm-copy.s
+++ b/lld/test/ELF/arm-copy.s
@@ -25,7 +25,7 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x13220
+// CHECK-NEXT: Address: 0x40220
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 8
// CHECK-NEXT: Link:
@@ -35,13 +35,13 @@ _start:
// CHECK: Relocations [
// CHECK-NEXT: Section {{.*}} .rel.dyn {
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x13220
+// CHECK-NEXT: Offset: 0x40220
// CHECK-NEXT: Type: R_ARM_COPY
// CHECK-NEXT: Symbol: y
// CHECK-NEXT: Addend: 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x13224
+// CHECK-NEXT: Offset: 0x40224
// CHECK-NEXT: Type: R_ARM_COPY
// CHECK-NEXT: Symbol: z
// CHECK-NEXT: Addend: 0x0
@@ -50,14 +50,14 @@ _start:
// CHECK: Symbols [
// CHECK: Name: y
-// CHECK-NEXT: Value: 0x13220
+// CHECK-NEXT: Value: 0x40220
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
// CHECK-NEXT: Other:
// CHECK-NEXT: Section: .bss
// CHECK: Name: z
-// CHECK-NEXT: Value: 0x13224
+// CHECK-NEXT: Value: 0x40224
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -67,13 +67,13 @@ _start:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
// CODE-NEXT: <_start>:
-// S + A = 0x13220 + 0 = 65536 * 1 + 12832
-// CODE-NEXT: 111b4: movw r2, #12832
-// CODE-NEXT: 111b8: movt r2, #1
-// CODE-NEXT: 111bc: ldr r3, [pc, #4]
-// CODE-NEXT: 111c0: ldr r3, [r3]
+/// S + A = 0x40220 + 0 = 65536 * 1 + 544
+// CODE-NEXT: 201b4: movw r2, #544
+// CODE-NEXT: 201b8: movt r2, #4
+// CODE-NEXT: 201bc: ldr r3, [pc, #4]
+// CODE-NEXT: 201c0: ldr r3, [r3]
// RODATA: Contents of section .rodata:
-// S(z) = 0x13004
-// RODATA-NEXT: 101b0 24320100
+/// S(z) = 0x40004
+// RODATA-NEXT: 101b0 24020400
diff --git a/lld/test/ELF/arm-execute-only.s b/lld/test/ELF/arm-execute-only.s
index 1d38cae6ec66..483d33d19fcd 100644
--- a/lld/test/ELF/arm-execute-only.s
+++ b/lld/test/ELF/arm-execute-only.s
@@ -10,19 +10,19 @@
// RUN: ld.lld %t.o %t2.o -o %t.so -shared
// RUN: llvm-readelf -l %t.so | FileCheck --check-prefix=DIFF --implicit-check-not=LOAD %s
-// CHECK: LOAD 0x000000 0x00000000 0x00000000 0x0016d 0x0016d R 0x1000
-// CHECK: LOAD 0x000170 0x00001170 0x00001170 0x{{.*}} 0x{{.*}} R E 0x1000
-// CHECK: LOAD 0x000174 0x00002174 0x00002174 0x{{.*}} 0x{{.*}} E 0x1000
-// CHECK: LOAD 0x000178 0x00003178 0x00003178 0x00038 0x00038 RW 0x1000
+// CHECK: LOAD 0x000000 0x00000000 0x00000000 0x0016d 0x0016d R 0x10000
+// CHECK: LOAD 0x000170 0x00010170 0x00010170 0x{{.*}} 0x{{.*}} R E 0x10000
+// CHECK: LOAD 0x000174 0x00020174 0x00020174 0x{{.*}} 0x{{.*}} E 0x10000
+// CHECK: LOAD 0x000178 0x00030178 0x00030178 0x00038 0x00038 RW 0x10000
// CHECK: 01 .dynsym .gnu.hash .hash .dynstr
// CHECK: 02 .text
// CHECK: 03 .foo
// CHECK: 04 .dynamic
-// DIFF: LOAD 0x000000 0x00000000 0x00000000 0x0014d 0x0014d R 0x1000
-// DIFF: LOAD 0x000150 0x00001150 0x00001150 0x0000c 0x0000c R E 0x1000
-// DIFF: LOAD 0x00015c 0x0000215c 0x0000215c 0x00038 0x00038 RW 0x1000
+// DIFF: LOAD 0x000000 0x00000000 0x00000000 0x0014d 0x0014d R 0x10000
+// DIFF: LOAD 0x000150 0x00010150 0x00010150 0x0000c 0x0000c R E 0x10000
+// DIFF: LOAD 0x00015c 0x0002015c 0x0002015c 0x00038 0x00038 RW 0x10000
// DIFF: 01 .dynsym .gnu.hash .hash .dynstr
// DIFF: 02 .text .foo
diff --git a/lld/test/ELF/arm-exidx-add-missing.s b/lld/test/ELF/arm-exidx-add-missing.s
index da3c271f2355..856b1d293204 100644
--- a/lld/test/ELF/arm-exidx-add-missing.s
+++ b/lld/test/ELF/arm-exidx-add-missing.s
@@ -5,17 +5,17 @@
// RUN: ld.lld %t -o %t3
// RUN: llvm-objdump -s %t3 | FileCheck %s --check-prefix=CHECK-MERGE
-// The ARM.exidx section is a table of 8-byte entries of the form:
-// | PREL31 Relocation to start of function | Unwinding information |
-// The range of addresses covered by the table entry is terminated by the
-// next table entry. This means that an executable section without a .ARM.exidx
-// section does not terminate the range of addresses. To fix this the linker
-// synthesises an EXIDX_CANTUNWIND entry for each section without a .ARM.exidx
-// section.
+/// The ARM.exidx section is a table of 8-byte entries of the form:
+/// | PREL31 Relocation to start of function | Unwinding information |
+/// The range of addresses covered by the table entry is terminated by the
+/// next table entry. This means that an executable section without a .ARM.exidx
+/// section does not terminate the range of addresses. To fix this the linker
+/// synthesises an EXIDX_CANTUNWIND entry for each section without a .ARM.exidx
+/// section.
.syntax unified
- // Expect inline unwind instructions
+ /// Expect inline unwind instructions
.section .text.01, "ax", %progbits
.global f1
f1:
@@ -25,18 +25,18 @@ f1:
.setfp r7, sp, #0
.fnend
- // Expect no unwind information from assembler. The linker must
- // synthesise an EXIDX_CANTUNWIND entry to prevent an exception
- // thrown through f2 from matching against the unwind instructions
- // for f1.
+ /// Expect no unwind information from assembler. The linker must
+ /// synthesise an EXIDX_CANTUNWIND entry to prevent an exception
+ /// thrown through f2 from matching against the unwind instructions
+ /// for f1.
.section .text.02, "ax", %progbits
.global f2
f2:
bx lr
- // Expect 1 EXIDX_CANTUNWIND entry that can be merged into the linker
- // generated EXIDX_CANTUNWIND as if the assembler had generated it.
+ /// Expect 1 EXIDX_CANTUNWIND entry that can be merged into the linker
+ /// generated EXIDX_CANTUNWIND as if the assembler had generated it.
.section .text.03, "ax",%progbits
.global f3
f3:
@@ -45,22 +45,22 @@ f3:
.cantunwind
.fnend
- // Dummy implementation of personality routines to satisfy reference
- // from exception tables, linker will generate EXIDX_CANTUNWIND.
+ /// Dummy implementation of personality routines to satisfy reference
+ /// from exception tables, linker will generate EXIDX_CANTUNWIND.
.section .text.__aeabi_unwind_cpp_pr0, "ax", %progbits
.global __aeabi_unwind_cpp_pr0
__aeabi_unwind_cpp_pr0:
bx lr
-// f1, f2
-// CHECK: 100d4 28100000 08849780 24100000 01000000
-// f3, __aeabi_unwind_cpp_pr0
-// CHECK-NEXT: 100e4 20100000 01000000 1c100000 01000000
-// sentinel
-// CHECK-NEXT: 100f4 18100000 01000000
+/// f1, f2
+// CHECK: 100d4 28000100 08849780 24000100 01000000
+/// f3, __aeabi_unwind_cpp_pr0
+// CHECK-NEXT: 100e4 20000100 01000000 1c000100 01000000
+/// sentinel
+// CHECK-NEXT: 100f4 18000100 01000000
-// f1, (f2, f3, __aeabi_unwind_cpp_pr0)
-// CHECK-MERGE: 100d4 18100000 08849780 14100000 01000000
-// sentinel
-// CHECK-MERGE-NEXT: 100e4 18100000 01000000
+/// f1, (f2, f3, __aeabi_unwind_cpp_pr0)
+// CHECK-MERGE: 100d4 18000100 08849780 14000100 01000000
+/// sentinel
+// CHECK-MERGE-NEXT: 100e4 18000100 01000000
diff --git a/lld/test/ELF/arm-exidx-canunwind.s b/lld/test/ELF/arm-exidx-canunwind.s
index 765892ef544d..0c87b828cd81 100644
--- a/lld/test/ELF/arm-exidx-canunwind.s
+++ b/lld/test/ELF/arm-exidx-canunwind.s
@@ -55,26 +55,26 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
-// CHECK-NEXT: 11108: bl #4 <func1>
+// CHECK-NEXT: 20108: bl #4 <func1>
// CHECK-NEXT: bl #4 <func2>
// CHECK-NEXT: bx lr
// CHECK: <func1>:
-// CHECK-NEXT: 11114: bx lr
+// CHECK-NEXT: 20114: bx lr
// CHECK: <func2>:
-// CHECK-NEXT: 11118: bx lr
+// CHECK-NEXT: 20118: bx lr
// CHECK: <__gxx_personality_v0>:
-// CHECK-NEXT: 1111c: bx lr
+// CHECK-NEXT: 2011c: bx lr
// CHECK: <__aeabi_unwind_cpp_pr0>:
-// CHECK-NEXT: 11120: bx lr
+// CHECK-NEXT: 20120: bx lr
-// 100d4 + 0x1034 = 0x11108 = main (linker generated cantunwind)
-// 100dc + 0x1038 = 0x11114 = func1 (inline unwinding data)
-// CHECK-EXIDX: 100d4 34100000 01000000 38100000 08849780
-// 100e4 + 0x1034 = 0x11118 = func2 (100e8 + 14 = 100fc = .ARM.extab entry)
-// 100ec + 0x1030 = 0x1111c = __gxx_personality_v0 (linker generated cantunwind)
-// CHECK-EXIDX-NEXT: 100e4 34100000 14000000 30100000 01000000
-// 100f4 + 0x1030 = 1101c = sentinel
-// CHECK-EXIDX-NEXT: 100f4 30100000 01000000
+/// 100d4 + 0x10034 = 0x20108 = main (linker generated cantunwind)
+/// 100dc + 0x10038 = 0x20114 = func1 (inline unwinding data)
+// CHECK-EXIDX: 100d4 34000100 01000000 38000100 08849780
+/// 100e4 + 0x10034 = 0x20118 = func2 (100e8 + 14 = 100fc = .ARM.extab entry)
+/// 100ec + 0x10030 = 0x2011c = __gxx_personality_v0 (linker generated cantunwind)
+// CHECK-EXIDX-NEXT: 100e4 34000100 14000000 30000100 01000000
+/// 100f4 + 0x10030 = 1101c = sentinel
+// CHECK-EXIDX-NEXT: 100f4 30000100 01000000
// CHECK-PT: Name: .ARM.exidx
// CHECK-PT-NEXT: Type: SHT_ARM_EXIDX (0x70000001)
diff --git a/lld/test/ELF/arm-exidx-dedup.s b/lld/test/ELF/arm-exidx-dedup.s
index b0ad82e5ea12..33c85ed54c8d 100644
--- a/lld/test/ELF/arm-exidx-dedup.s
+++ b/lld/test/ELF/arm-exidx-dedup.s
@@ -5,29 +5,29 @@
// RUN: ld.lld %t -o %t3
// RUN: llvm-objdump -s %t3 | FileCheck %s
-// Test that lld can at least remove duplicate .ARM.exidx sections. A more
-// fine grained implementation will be able to remove duplicate entries within
-// a .ARM.exidx section.
+/// Test that lld can at least remove duplicate .ARM.exidx sections. A more
+/// fine grained implementation will be able to remove duplicate entries within
+/// a .ARM.exidx section.
-// With duplicate entries
+/// With duplicate entries
// CHECK-DUPS: Contents of section .ARM.exidx:
-// CHECK-DUPS-NEXT: 100d4 78100000 01000000 74100000 01000000
-// CHECK-DUPS-NEXT: 100e4 70100000 01000000 6c100000 01000000
-// CHECK-DUPS-NEXT: 100f4 68100000 08849780 64100000 08849780
-// CHECK-DUPS-NEXT: 10104 60100000 08849780 5c100000 24000000
-// CHECK-DUPS-NEXT: 10114 58100000 28000000 54100000 01000000
-// CHECK-DUPS-NEXT: 10124 50100000 01000000 4c100000 01000000
+// CHECK-DUPS-NEXT: 100d4 78000100 01000000 74000100 01000000
+// CHECK-DUPS-NEXT: 100e4 70000100 01000000 6c000100 01000000
+// CHECK-DUPS-NEXT: 100f4 68000100 08849780 64000100 08849780
+// CHECK-DUPS-NEXT: 10104 60000100 08849780 5c000100 24000000
+// CHECK-DUPS-NEXT: 10114 58000100 28000000 54000100 01000000
+// CHECK-DUPS-NEXT: 10124 50000100 01000000 4c000100 01000000
// CHECK-DUPS-NEXT: Contents of section .ARM.extab:
-// After duplicate entry removal
+/// After duplicate entry removal
// CHECK: Contents of section .ARM.exidx:
-// CHECK-NEXT: 100d4 48100000 01000000 50100000 08849780
-// CHECK-NEXT: 100e4 54100000 1c000000 50100000 20000000
-// CHECK-NEXT: 100f4 4c100000 01000000 4c100000 01000000
+// CHECK-NEXT: 100d4 48000100 01000000 50000100 08849780
+// CHECK-NEXT: 100e4 54000100 1c000000 50000100 20000000
+// CHECK-NEXT: 100f4 4c000100 01000000 4c000100 01000000
// CHECK-NEXT: Contents of section .ARM.extab:
.syntax unified
- // Expect 1 EXIDX_CANTUNWIND entry.
+ /// Expect 1 EXIDX_CANTUNWIND entry.
.section .text.00, "ax", %progbits
.globl _start
_start:
@@ -36,7 +36,7 @@ _start:
.cantunwind
.fnend
- // Expect .ARM.exidx.text.01 to be identical to .ARM.exidx.text.00
+ /// Expect .ARM.exidx.text.01 to be identical to .ARM.exidx.text.00
.section .text.01, "ax", %progbits
.globl f1
f1:
@@ -45,8 +45,8 @@ f1:
.cantunwind
.fnend
- // Expect 2 EXIDX_CANTUNWIND entries, these can be duplicated into
- // .ARM.exid.text.00
+ /// Expect 2 EXIDX_CANTUNWIND entries, these can be duplicated into
+ /// .ARM.exid.text.00
.section .text.02, "ax", %progbits
.globl f2
f2:
@@ -62,7 +62,7 @@ f3:
.cantunwind
.fnend
- // Expect inline unwind instructions, not a duplicate of previous entry.
+ /// Expect inline unwind instructions, not a duplicate of previous entry.
.section .text.03, "ax", %progbits
.global f4
f4:
@@ -72,8 +72,8 @@ f4:
.setfp r7, sp, #0
.fnend
- // Expect 2 inline unwind entries that are a duplicate of
- // .ARM.exidx.text.03
+ /// Expect 2 inline unwind entries that are a duplicate of
+ /// .ARM.exidx.text.03
.section .text.04, "ax", %progbits
.global f5
f5:
@@ -91,8 +91,8 @@ f6:
.setfp r7, sp, #0
.fnend
- // Expect a section with a reference to an .ARM.extab. Not a duplicate
- // of previous inline table entry.
+ /// Expect a section with a reference to an .ARM.extab. Not a duplicate
+ /// of previous inline table entry.
.section .text.05, "ax",%progbits
.global f7
f7:
@@ -103,8 +103,8 @@ f7:
.long 0
.fnend
- // Expect a reference to an identical .ARM.extab. We do not try to
- // deduplicate references to .ARM.extab sections.
+ /// Expect a reference to an identical .ARM.extab. We do not try to
+ /// deduplicate references to .ARM.extab sections.
.section .text.06, "ax",%progbits
.global f8
f8:
@@ -115,9 +115,9 @@ f8:
.long 0
.fnend
-// Dummy implementation of personality routines to satisfy reference from
-// exception tables
-// Expect Linker generated EXIDX_CANTUNWIND tables
+/// Dummy implementation of personality routines to satisfy reference from
+/// exception tables
+/// Expect Linker generated EXIDX_CANTUNWIND tables
.section .text.__gcc_personality_v0, "ax", %progbits
.global __gxx_personality_v0
__gxx_personality_v0:
diff --git a/lld/test/ELF/arm-exidx-emit-relocs.s b/lld/test/ELF/arm-exidx-emit-relocs.s
index f0d2941bf38f..52c208272114 100644
--- a/lld/test/ELF/arm-exidx-emit-relocs.s
+++ b/lld/test/ELF/arm-exidx-emit-relocs.s
@@ -4,13 +4,13 @@
// RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
// RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
-// LLD does not support --emit-relocs for .ARM.exidx sections as the relocations
-// from synthetic table entries won't be represented. Given the known use cases
-// of --emit-relocs, relocating kernels, and binary analysis, the former doesn't
-// use exceptions and the latter can derive the relocations from the table if
-// they need them.
+/// LLD does not support --emit-relocs for .ARM.exidx sections as the relocations
+/// from synthetic table entries won't be represented. Given the known use cases
+/// of --emit-relocs, relocating kernels, and binary analysis, the former doesn't
+/// use exceptions and the latter can derive the relocations from the table if
+/// they need them.
.syntax unified
- // Will produce an ARM.exidx entry with inline unwinding instructions
+ /// Will produce an ARM.exidx entry with inline unwinding instructions
.section .text.func1, "ax",%progbits
.global func1
func1:
@@ -22,7 +22,7 @@ func1:
.syntax unified
.section .text.func2, "ax",%progbits
-// A function with the same inline unwinding instructions, expect merge.
+/// A function with the same inline unwinding instructions, expect merge.
.global func2
func2:
.fnstart
@@ -49,7 +49,7 @@ func26:
.syntax unified
.section .text.func3, "ax",%progbits
-// A function with the same inline unwinding instructions, expect merge.
+/// A function with the same inline unwinding instructions, expect merge.
.global func3
func3:
.fnstart
@@ -64,8 +64,8 @@ __aeabi_unwind_cpp_pr0:
bx lr
// CHECK: Contents of section .ARM.exidx:
-// CHECK-NEXT: 100d4 28100000 08849780 28100000 01000000
-// CHECK-NEXT: 100e4 28100000 08849780 24100000 01000000
-// CHECK-NEXT: 100f4 20100000 01000000
+// CHECK-NEXT: 100d4 28000100 08849780 28000100 01000000
+// CHECK-NEXT: 100e4 28000100 08849780 24000100 01000000
+// CHECK-NEXT: 100f4 20000100 01000000
// CHECK-RELOCS-NOT: Relocation section '.rel.ARM.exidx'
diff --git a/lld/test/ELF/arm-exidx-gc.s b/lld/test/ELF/arm-exidx-gc.s
index 117f2cfb5173..4b04b246827c 100644
--- a/lld/test/ELF/arm-exidx-gc.s
+++ b/lld/test/ELF/arm-exidx-gc.s
@@ -4,11 +4,11 @@
// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi --no-show-raw-insn %t2 | FileCheck %s
// RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-EXIDX %s
-// Test the behavior of .ARM.exidx sections under garbage collection
-// A .ARM.exidx section is live if it has a relocation to a live executable
-// section.
-// A .ARM.exidx section may have a relocation to a .ARM.extab section, if the
-// .ARM.exidx is live then the .ARM.extab section is live
+/// Test the behavior of .ARM.exidx sections under garbage collection
+/// A .ARM.exidx section is live if it has a relocation to a live executable
+/// section.
+/// A .ARM.exidx section may have a relocation to a .ARM.extab section, if the
+/// .ARM.exidx is live then the .ARM.extab section is live
.syntax unified
.section .text.func1, "ax",%progbits
@@ -28,9 +28,9 @@ unusedfunc1:
.cantunwind
.fnend
- // Unwinding instructions for .text2 too large for an inline entry ARM.exidx
- // entry. A separate .ARM.extab section is created to hold the unwind entries
- // The .ARM.exidx table entry has a reference to the .ARM.extab section.
+ /// Unwinding instructions for .text2 too large for an inline entry ARM.exidx
+ /// entry. A separate .ARM.extab section is created to hold the unwind entries
+ /// The .ARM.exidx table entry has a reference to the .ARM.extab section.
.section .text.func2, "ax",%progbits
.global func2
func2:
@@ -41,8 +41,8 @@ func2:
.section .text.func2
.fnend
- // An unused function with a reference to a .ARM.extab section. Both should
- // be removed by gc.
+ /// An unused function with a reference to a .ARM.extab section. Both should
+ /// be removed by gc.
.section .text.unusedfunc2, "ax",%progbits
.global unusedfunc2
unusedfunc2:
@@ -53,8 +53,8 @@ unusedfunc2:
.section .text.unusedfunc2
.fnend
- // Dummy implementation of personality routines to satisfy reference from
- // exception tables
+ /// Dummy implementation of personality routines to satisfy reference from
+ /// exception tables
.section .text.__gcc_personality_v0, "ax", %progbits
.global __gxx_personality_v0
__gxx_personality_v0:
@@ -87,40 +87,40 @@ _start:
bl func2
bx lr
-// GC should have only removed unusedfunc1 and unusedfunc2 the personality
-// routines are kept alive by references from live .ARM.exidx and .ARM.extab
-// sections
+/// GC should have only removed unusedfunc1 and unusedfunc2 the personality
+/// routines are kept alive by references from live .ARM.exidx and .ARM.extab
+/// sections
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
-// CHECK-NEXT: 1110c: bl #4 <func1>
-// CHECK-NEXT: 11110: bl #4 <func2>
-// CHECK-NEXT: 11114: bx lr
+// CHECK-NEXT: 2010c: bl #4 <func1>
+// CHECK-NEXT: 20110: bl #4 <func2>
+// CHECK-NEXT: 20114: bx lr
// CHECK: <func1>:
-// CHECK-NEXT: 11118: bx lr
+// CHECK-NEXT: 20118: bx lr
// CHECK: <func2>:
-// CHECK-NEXT: 1111c: bx lr
+// CHECK-NEXT: 2011c: bx lr
// CHECK: <__gxx_personality_v0>:
-// CHECK-NEXT: 11120: bx lr
+// CHECK-NEXT: 20120: bx lr
// CHECK: <__aeabi_unwind_cpp_pr0>:
-// CHECK-NEXT: 11124: bx lr
+// CHECK-NEXT: 20124: bx lr
-// GC should have removed table entries for unusedfunc1, unusedfunc2
-// and __gxx_personality_v1
+/// GC should have removed table entries for unusedfunc1, unusedfunc2
+/// and __gxx_personality_v1
// CHECK-NOT: unusedfunc1
// CHECK-NOT: unusedfunc2
// CHECK-NOT: __gxx_personality_v1
-// CHECK-EXIDX: Contents of section .ARM.exidx:
-// 100d4 + 1038 = 1110c = _start
-// 100dc + 103c = 11118 = func1
-// CHECK-EXIDX-NEXT: 100d4 38100000 01000000 3c100000 08849780
-// 100e4 + 1038 = 1111c = func2 (100e8 + 1c = 10104 = .ARM.extab)
-// 100ec + 1034 = 11120 = __gxx_personality_v0
-// CHECK-EXIDX-NEXT: 100e4 38100000 1c000000 34100000 01000000
-// 100f4 + 1030 = 11018 = __aeabi_unwind_cpp_pr0
-// 100fc + 102c = 1101c = __aeabi_unwind_cpp_pr0 + sizeof(__aeabi_unwind_cpp_pr0)
-// CHECK-EXIDX-NEXT: 100f4 30100000 01000000 2c100000 01000000
+/// CHECK-EXIDX: Contents of section .ARM.exidx:
+/// 100d4 + 1038 = 1110c = _start
+/// 100dc + 103c = 11118 = func1
+// CHECK-EXIDX-NEXT: 100d4 38000100 01000000 3c000100 08849780
+/// 100e4 + 1038 = 1111c = func2 (100e8 + 1c = 10104 = .ARM.extab)
+/// 100ec + 1034 = 11120 = __gxx_personality_v0
+// CHECK-EXIDX-NEXT: 100e4 38000100 1c000000 34000100 01000000
+/// 100f4 + 1030 = 11018 = __aeabi_unwind_cpp_pr0
+/// 100fc + 102c = 1101c = __aeabi_unwind_cpp_pr0 + sizeof(__aeabi_unwind_cpp_pr0)
+// CHECK-EXIDX-NEXT: 100f4 30000100 01000000 2c000100 01000000
// CHECK-EXIDX-NEXT: Contents of section .ARM.extab:
-// 10104 + 101c = 11120 = __gxx_personality_v0
-// CHECK-EXIDX-NEXT: 10104 1c100000 b0b0b000
+/// 10104 + 101c = 11120 = __gxx_personality_v0
+// CHECK-EXIDX-NEXT: 10104 1c000100 b0b0b000
diff --git a/lld/test/ELF/arm-exidx-order.s b/lld/test/ELF/arm-exidx-order.s
index 7cae2b2acc7c..efff7b547396 100644
--- a/lld/test/ELF/arm-exidx-order.s
+++ b/lld/test/ELF/arm-exidx-order.s
@@ -13,12 +13,12 @@
// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-SCRIPT %s
// RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-SCRIPT-EXIDX %s
-// Each assembler created .ARM.exidx section has the SHF_LINK_ORDER flag set
-// with the sh_link containing the section index of the executable section
-// containing the function it describes. The linker must combine the .ARM.exidx
-// InputSections in the same order that it has combined the executable section,
-// such that the combined .ARM.exidx OutputSection can be used as a binary
-// search table.
+/// Each assembler created .ARM.exidx section has the SHF_LINK_ORDER flag set
+/// with the sh_link containing the section index of the executable section
+/// containing the function it describes. The linker must combine the .ARM.exidx
+/// InputSections in the same order that it has combined the executable section,
+/// such that the combined .ARM.exidx OutputSection can be used as a binary
+/// search table.
.syntax unified
.section .text, "ax",%progbits
@@ -51,60 +51,60 @@ f3:
.cantunwind
.fnend
-// Check default no linker script order.
+/// Check default no linker script order.
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK: <_start>:
-// CHECK-NEXT: 11124: bx lr
+// CHECK-NEXT: 20124: bx lr
// CHECK: <f1>:
-// CHECK-NEXT: 11128: bx lr
+// CHECK-NEXT: 20128: bx lr
// CHECK: <f2>:
-// CHECK-NEXT: 1112c: bx lr
+// CHECK-NEXT: 2012c: bx lr
// CHECK: <f3>:
-// CHECK-NEXT: 11130: bx lr
+// CHECK-NEXT: 20130: bx lr
// CHECK: <func4>:
-// CHECK-NEXT: 11134: bx lr
+// CHECK-NEXT: 20134: bx lr
// CHECK: <func5>:
-// CHECK-NEXT: 11138: bx lr
+// CHECK-NEXT: 20138: bx lr
// CHECK: Disassembly of section .func1:
// CHECK-EMPTY:
// CHECK-NEXT: <func1>:
-// CHECK-NEXT: 1113c: bx lr
+// CHECK-NEXT: 2013c: bx lr
// CHECK: Disassembly of section .func2:
// CHECK-EMPTY:
// CHECK-NEXT: <func2>:
-// CHECK-NEXT: 11140: bx lr
+// CHECK-NEXT: 20140: bx lr
// CHECK: Disassembly of section .func3:
// CHECK-EMPTY:
// CHECK-NEXT: <func3>:
-// CHECK-NEXT: 11144: bx lr
+// CHECK-NEXT: 20144: bx lr
-// Each .ARM.exidx section has two 4 byte fields
-// Field 1 is the 31-bit offset to the function. The top bit is used to
-// indicate whether Field 2 is a pointer or an inline table entry.
-// Field 2 is either a pointer to a .ARM.extab section or an inline table
-// In this example all Field 2 entries are inline can't unwind (0x1)
-// We expect to see the entries in the same order as the functions
+/// Each .ARM.exidx section has two 4 byte fields
+/// Field 1 is the 31-bit offset to the function. The top bit is used to
+/// indicate whether Field 2 is a pointer or an inline table entry.
+/// Field 2 is either a pointer to a .ARM.extab section or an inline table
+/// In this example all Field 2 entries are inline can't unwind (0x1)
+/// We expect to see the entries in the same order as the functions
// CHECK-EXIDX: Contents of section .ARM.exidx:
-// 100d4 + 1050 = 11124 = _start
-// 100dc + 104c = 11128 = f1
-// CHECK-EXIDX-NEXT: 100d4 50100000 01000000 4c100000 01000000
-// 100e4 + 1048 = 1112c = f2
-// 100ec + 1044 = 11130 = f3
-// CHECK-EXIDX-NEXT: 100e4 48100000 01000000 44100000 01000000
-// 100f4 + 1040 = 11134 = func4
-// 100fc + 103c = 11138 = func5
-// CHECK-EXIDX-NEXT: 100f4 40100000 01000000 3c100000 01000000
-// 10104 + 1038 = 1113c = func1
-// 1010c + 1034 = 11140 = func2
-// CHECK-EXIDX-NEXT: 10104 38100000 01000000 34100000 01000000
-// 10114 + 1030 = 11144 = func3
-// CHECK-EXIDX-NEXT: 10114 30100000 01000000
+/// 100d4 + 1050 = 11124 = _start
+/// 100dc + 104c = 11128 = f1
+// CHECK-EXIDX-NEXT: 100d4 50000100 01000000 4c000100 01000000
+/// 100e4 + 1048 = 1112c = f2
+/// 100ec + 1044 = 11130 = f3
+// CHECK-EXIDX-NEXT: 100e4 48000100 01000000 44000100 01000000
+/// 100f4 + 1040 = 11134 = func4
+/// 100fc + 103c = 11138 = func5
+// CHECK-EXIDX-NEXT: 100f4 40000100 01000000 3c000100 01000000
+/// 10104 + 1038 = 1113c = func1
+/// 1010c + 1034 = 11140 = func2
+// CHECK-EXIDX-NEXT: 10104 38000100 01000000 34000100 01000000
+/// 10114 + 1030 = 11144 = func3
+// CHECK-EXIDX-NEXT: 10114 30000100 01000000
-// Check that PT_ARM_EXIDX program header has been generated that describes
-// the .ARM.exidx output section
+/// Check that PT_ARM_EXIDX program header has been generated that describes
+/// the .ARM.exidx output section
// CHECK-PT: Name: .ARM.exidx
// CHECK-PT-NEXT: Type: SHT_ARM_EXIDX (0x70000001)
// CHECK-PT-NEXT: Flags [
@@ -128,8 +128,8 @@ f3:
// CHECK-PT-NEXT: }
-// Check linker script order. The .ARM.exidx section will be inserted after
-// the .text section but before the orphan sections
+/// Check linker script order. The .ARM.exidx section will be inserted after
+/// the .text section but before the orphan sections
// CHECK-SCRIPT: Disassembly of section .text:
// CHECK-SCRIPT-EMPTY:
@@ -161,20 +161,20 @@ f3:
// CHECK-SCRIPT-NEXT: <func3>:
// CHECK-SCRIPT-NEXT: 11020: 1e ff 2f e1 bx lr
-// Check that the .ARM.exidx section is sorted in order as the functions
-// The offset in field 1, is 32-bit so in the binary the most significant bit
-// 11024 - 24 = 11000 func4
-// 1102c - 28 = 11004 func5
+/// Check that the .ARM.exidx section is sorted in order as the functions
+/// The offset in field 1, is 32-bit so in the binary the most significant bit
+/// 11024 - 24 = 11000 func4
+/// 1102c - 28 = 11004 func5
// CHECK-SCRIPT-EXIDX: 11024 dcffff7f 01000000 d8ffff7f 01000000
-// 11034 - 2c = 11008 _start
-// 1103c - 30 = 1100c f1
+/// 11034 - 2c = 11008 _start
+/// 1103c - 30 = 1100c f1
// CHECK-SCRIPT-EXIDX-NEXT: 11034 d4ffff7f 01000000 d0ffff7f 01000000
-// 11044 - 34 = 11010 f2
-// 1104c - 38 = 11014 f3
+/// 11044 - 34 = 11010 f2
+/// 1104c - 38 = 11014 f3
// CHECK-SCRIPT-EXIDX-NEXT: 11044 ccffff7f 01000000 c8ffff7f 01000000
-// 11054 - 3c = 11018 func1
-// 1105c - 40 = 1101c func2
+/// 11054 - 3c = 11018 func1
+/// 1105c - 40 = 1101c func2
// CHECK-SCRIPT-EXIDX-NEXT: 11054 c4ffff7f 01000000 c0ffff7f 01000000
-// 11064 - 44 = 11020 func3
-// 11068 - 48 = 11024 func3 + sizeof(func3)
+/// 11064 - 44 = 11020 func3
+/// 11068 - 48 = 11024 func3 + sizeof(func3)
// CHECK-SCRIPT-EXIDX-NEXT: 11064 bcffff7f 01000000 b8ffff7f 01000000
diff --git a/lld/test/ELF/arm-exidx-shared.s b/lld/test/ELF/arm-exidx-shared.s
index 8f7e7ae2f05f..fce605d6d96a 100644
--- a/lld/test/ELF/arm-exidx-shared.s
+++ b/lld/test/ELF/arm-exidx-shared.s
@@ -38,8 +38,8 @@ __aeabi_unwind_cpp_pr0:
// CHECK: Relocations [
// CHECK-NEXT: Section {{.*}} .rel.plt {
-// CHECK-NEXT: 0x32DC R_ARM_JUMP_SLOT __gxx_personality_v0
+// CHECK-NEXT: 0x302DC R_ARM_JUMP_SLOT __gxx_personality_v0
// CHECK-EXTAB: Contents of section .ARM.extab:
-// 0x0238 + 0x1038 = 0x1270 = __gxx_personality_v0(PLT)
-// CHECK-EXTAB-NEXT: 0238 38100000 b0b0b000 00000000
+// 0x0238 + 0x1038 = 0x1270 = __gxx_personality_v0(PLT)
+// CHECK-EXTAB-NEXT: 0238 38000100 b0b0b000 00000000
diff --git a/lld/test/ELF/arm-fix-cortex-a8-blx.s b/lld/test/ELF/arm-fix-cortex-a8-blx.s
index 8de8de187ea5..636094fd798b 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-blx.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-blx.s
@@ -1,13 +1,13 @@
// REQUIRES: arm
// RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o
// RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2 2>&1 | FileCheck %s
-// RUN: llvm-objdump -d --no-show-raw-insn --start-address=0x12ffa --stop-address=0x13008 %t2 | FileCheck --check-prefix=CHECK-PATCH %s
+// RUN: llvm-objdump -d --no-show-raw-insn --start-address=0x21ffa --stop-address=0x22008 %t2 | FileCheck --check-prefix=CHECK-PATCH %s
/// Test that the patch can work on an unrelocated BLX. Neither clang or GCC
/// will emit these without a relocation, but they could be produced by ELF
/// processing tools.
-// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 12FFE in unpatched output.
+// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 21FFE in unpatched output.
.syntax unified
.text
@@ -27,7 +27,7 @@ _start:
.inst.n 0xf7ff
.inst.n 0xe800
-// CHECK-PATCH: 12ffa: nop.w
-// CHECK-PATCH-NEXT: 12ffe: blx #4
-// CHECK-PATCH: 00013004 <__CortexA8657417_12FFE>:
-// CHECK-PATCH-NEXT: 13004: b #-4104
+// CHECK-PATCH: 21ffa: nop.w
+// CHECK-PATCH-NEXT: 21ffe: blx #4
+// CHECK-PATCH: 00022004 <__CortexA8657417_21FFE>:
+// CHECK-PATCH-NEXT: 22004: b #-4104
diff --git a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s
index 76bcb3e165f7..2f9e1962a868 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s
@@ -1,13 +1,13 @@
// REQUIRES: arm
// RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o
// RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2
-// RUN: llvm-objdump -d %t2 --start-address=0x12ffa --stop-address=0x13002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x13ffa --stop-address=0x14002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x14ffa --stop-address=0x15002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x15ffa --stop-address=0x16006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x16ffe --stop-address=0x17002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x18000 --stop-address=0x18004 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x19002 --stop-address=0x19006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x21ffa --stop-address=0x22002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x22ffa --stop-address=0x23002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x23ffa --stop-address=0x24002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x24ffa --stop-address=0x25006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x25ffe --stop-address=0x26002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x27000 --stop-address=0x28004 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x28002 --stop-address=0x29006 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s
/// Test boundary conditions of the cortex-a8 erratum. The following cases
/// should not trigger the Erratum
@@ -27,9 +27,9 @@ target:
b.w target
b.w target
-// CALLSITE1: 00012ffa <target>:
-// CALLSITE1-NEXT: 12ffa: b.w #-4
-// CALLSITE1-NEXT: 12ffe: b.w #-8
+// CALLSITE1: 00021ffa <target>:
+// CALLSITE1-NEXT: 21ffa: b.w #-4
+// CALLSITE1-NEXT: 21ffe: b.w #-8
.space 4088
.type target2, %function
@@ -40,10 +40,10 @@ target2:
nop
bl target2
-// CALLSITE2: 00013ffa <target2>:
-// CALLSITE2-NEXT: 13ffa: nop
-// CALLSITE2-NEXT: 13ffc: nop
-// CALLSITE2-NEXT: 13ffe: bl #-8
+// CALLSITE2: 00022ffa <target2>:
+// CALLSITE2-NEXT: 22ffa: nop
+// CALLSITE2-NEXT: 22ffc: nop
+// CALLSITE2-NEXT: 22ffe: bl #-8
.space 4088
.type target3, %function
@@ -54,9 +54,9 @@ target3:
nop.w
beq.w target2
-// CALLSITE3: 00014ffa <target3>:
-// CALLSITE3-NEXT: 14ffa: nop.w
-// CALLSITE3-NEXT: 14ffe: beq.w #-4104
+// CALLSITE3: 00023ffa <target3>:
+// CALLSITE3-NEXT: 23ffa: nop.w
+// CALLSITE3-NEXT: 23ffe: beq.w #-4104
.space 4088
.type source4, %function
@@ -69,11 +69,11 @@ source4:
target4:
nop.w
-// CALLSITE4: 00015ffa <source4>:
-// CALLSITE4-NEXT: 15ffa: nop.w
-// CALLSITE4-NEXT: 15ffe: beq.w #0
-// CALLSITE4: 00016002 <target4>:
-// CALLSITE4-NEXT: 16002: nop.w
+// CALLSITE4: 00024ffa <source4>:
+// CALLSITE4-NEXT: 24ffa: nop.w
+// CALLSITE4-NEXT: 24ffe: beq.w #0
+// CALLSITE4: 00025002 <target4>:
+// CALLSITE4-NEXT: 25002: nop.w
.space 4084
.type target5, %function
@@ -89,8 +89,8 @@ target5:
source5:
beq.w target5
-// CALLSITE5: 00016ffe <source5>:
-// CALLSITE5-NEXT: 16ffe: beq.w #-8
+// CALLSITE5: 00025ffe <source5>:
+// CALLSITE5-NEXT: 25ffe: beq.w #-8
/// Edge case where two word sequence starts at offset 0xffc, check that
/// we don't match. In this case the branch will be completely in the 2nd
@@ -104,8 +104,8 @@ source5:
target6:
bl target6
-// CALLSITE6: 00018000 <target6>:
-// CALLSITE6-NEXT: 18000: bl #-4
+// CALLSITE6: 00027000 <target6>:
+// CALLSITE6-NEXT: 27000: bl #-4
/// Edge case where two word sequence starts at offset 0xffe, check that
/// we don't match. In this case the branch will be completely in the 2nd
@@ -119,5 +119,5 @@ target6:
target7:
bl target7
-// CALLSITE7: 00019002 <target7>:
-// CALLSITE7: 19002: bl #-4
+// CALLSITE7: 00028002 <target7>:
+// CALLSITE7: 28002: bl #-4
diff --git a/lld/test/ELF/arm-fix-cortex-a8-recognize.s b/lld/test/ELF/arm-fix-cortex-a8-recognize.s
index fb9ba3e45074..7b1f08b16a72 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-recognize.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-recognize.s
@@ -1,25 +1,25 @@
// REQUIRES: arm
// RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o
// RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2 2>&1 | FileCheck %s
-// RUN: llvm-objdump -d %t2 --start-address=0x1a004 --stop-address=0x1a024 --no-show-raw-insn | FileCheck --check-prefix=CHECK-PATCHES %s
-// RUN: llvm-objdump -d %t2 --start-address=0x12ffa --stop-address=0x13002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x13ffa --stop-address=0x14002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x14ffa --stop-address=0x15002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x15ff4 --stop-address=0x16002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x16ffa --stop-address=0x17002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x17ffa --stop-address=0x18002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x18ffa --stop-address=0x19002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s
-// RUN: llvm-objdump -d %t2 --start-address=0x19ff4 --stop-address=0x1a002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE8 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x29004 --stop-address=0x29024 --no-show-raw-insn | FileCheck --check-prefix=CHECK-PATCHES %s
+// RUN: llvm-objdump -d %t2 --start-address=0x21ffa --stop-address=0x22002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x22ffa --stop-address=0x23002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x23ffa --stop-address=0x24002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x24ff4 --stop-address=0x25002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x25ffa --stop-address=0x26002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x26ffa --stop-address=0x27002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x27ffa --stop-address=0x28002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s
+// RUN: llvm-objdump -d %t2 --start-address=0x28ff4 --stop-address=0x29002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE8 %s
// RUN: ld.lld --fix-cortex-a8 -verbose -r %t.o -o %t3 2>&1 | FileCheck --check-prefix=CHECK-RELOCATABLE-LLD %s
// RUN: llvm-objdump --no-show-raw-insn -d %t3 --start-address=0xffa --stop-address=0x1002 | FileCheck --check-prefix=CHECK-RELOCATABLE %s
-// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 12FFE in unpatched output.
-// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 13FFE in unpatched output.
-// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 14FFE in unpatched output.
-// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 15FFE in unpatched output.
-// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 16FFE in unpatched output.
-// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 17FFE in unpatched output.
-// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 18FFE in unpatched output.
+// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 22FFE in unpatched output.
+// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 23FFE in unpatched output.
+// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 24FFE in unpatched output.
+// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 25FFE in unpatched output.
+// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 26FFE in unpatched output.
+// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 27FFE in unpatched output.
+// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 28FFE in unpatched output.
/// We do not detect errors when doing a relocatable link as we don't know what
/// the final addresses are.
@@ -53,9 +53,9 @@ target:
nop.w
b.w target
-// CALLSITE1: 00012ffa <target>:
-// CALLSITE1-NEXT: 12ffa: nop.w
-// CALLSITE1-NEXT: 12ffe: b.w #28674
+// CALLSITE1: 00021ffa <target>:
+// CALLSITE1-NEXT: 21ffa: nop.w
+// CALLSITE1-NEXT: 21ffe: b.w #28674
/// Expect no patch when doing a relocatable link ld -r.
// CHECK-RELOCATABLE: 00000ffa <target>:
// CHECK-RELOCATABLE-NEXT: ffa: nop.w
@@ -70,9 +70,9 @@ target2:
nop.w
bl target2
-// CALLSITE2: 00013ffa <target2>:
-// CALLSITE2-NEXT: 13ffa: nop.w
-// CALLSITE2-NEXT: 13ffe: bl #24582
+// CALLSITE2: 00022ffa <target2>:
+// CALLSITE2-NEXT: 22ffa: nop.w
+// CALLSITE2-NEXT: 22ffe: bl #24582
.space 4088
.type target3, %function
@@ -83,9 +83,9 @@ target3:
nop.w
beq.w target3
-// CALLSITE3: 00014ffa <target3>:
-// CALLSITE3-NEXT: 14ffa: nop.w
-// CALLSITE3-NEXT: 14ffe: beq.w #20490
+// CALLSITE3: 00023ffa <target3>:
+// CALLSITE3-NEXT: 23ffa: nop.w
+// CALLSITE3-NEXT: 23ffe: beq.w #20490
.space 4082
.type target4, %function
@@ -102,11 +102,11 @@ target4:
blx target4
/// Target = 0x19010 __CortexA8657417_15FFE
-// CALLSITE4: 00015ff4 <target4>:
-// CALLSITE4-NEXT: 15ff4: bx lr
-// CALLSITE4: 15ff8: 00 00 .short 0x0000
-// CALLSITE4: 15ffa: nop.w
-// CALLSITE4-NEXT: 15ffe: blx #16400
+// CALLSITE4: 00024ff4 <target4>:
+// CALLSITE4-NEXT: 24ff4: bx lr
+// CALLSITE4: 24ff8: 00 00 .short 0x0000
+// CALLSITE4: 24ffa: nop.w
+// CALLSITE4-NEXT: 24ffe: blx #16400
/// Separate sections for source and destination of branches to force
/// a relocation.
@@ -125,8 +125,8 @@ target5:
b.w target5
/// Target = 0x19014 __CortexA8657417_16FFE
-// CALLSITE5: 16ffa: nop.w
-// CALLSITE5-NEXT: 16ffe: b.w #12306
+// CALLSITE5: 25ffa: nop.w
+// CALLSITE5-NEXT: 25ffe: b.w #12306
.section .text.2, "ax", %progbits
.balign 2
@@ -143,8 +143,8 @@ target6:
bl target6
/// Target = 0x19018 __CortexA8657417_17FFE
-// CALLSITE6: 17ffa: nop.w
-// CALLSITE6-NEXT: 17ffe: bl #8214
+// CALLSITE6: 26ffa: nop.w
+// CALLSITE6-NEXT: 26ffe: bl #8214
.section .text.4, "ax", %progbits
.global target7
@@ -159,8 +159,8 @@ target7:
nop.w
bne.w target7
-// CALLSITE7: 18ffa: nop.w
-// CALLSITE7-NEXT: 18ffe: bne.w #4122
+// CALLSITE7: 27ffa: nop.w
+// CALLSITE7-NEXT: 27ffe: bne.w #4122
.section .text.6, "ax", %progbits
.space 4082
@@ -180,32 +180,32 @@ target8:
nop.w
bl target8
-// CALLSITE8: 00019ff4 <target8>:
-// CALLSITE8-NEXT: 19ff4: bx lr
-// CALLSITE8: 19ff8: 00 00 .short 0x0000
-// CALLSITE8: 19ffa: nop.w
-// CALLSITE8-NEXT: 19ffe: blx #32
+// CALLSITE8: 00028ff4 <target8>:
+// CALLSITE8-NEXT: 28ff4: bx lr
+// CALLSITE8: 28ff8: 00 00 .short 0x0000
+// CALLSITE8: 28ffa: nop.w
+// CALLSITE8-NEXT: 28ffe: blx #32
-// CHECK-PATCHES: 0001a004 <__CortexA8657417_12FFE>:
-// CHECK-PATCHES-NEXT: 1a004: b.w #-28686
+// CHECK-PATCHES: 00029004 <__CortexA8657417_21FFE>:
+// CHECK-PATCHES-NEXT: 29004: b.w #-28686
-// CHECK-PATCHES: 0001a008 <__CortexA8657417_13FFE>:
-// CHECK-PATCHES-NEXT: 1a008: b.w #-24594
+// CHECK-PATCHES: 00029008 <__CortexA8657417_22FFE>:
+// CHECK-PATCHES-NEXT: 29008: b.w #-24594
-// CHECK-PATCHES: 0001a00c <__CortexA8657417_14FFE>:
-// CHECK-PATCHES-NEXT: 1a00c: b.w #-20502
+// CHECK-PATCHES: 0002900c <__CortexA8657417_23FFE>:
+// CHECK-PATCHES-NEXT: 2900c: b.w #-20502
-// CHECK-PATCHES: 0001a010 <__CortexA8657417_15FFE>:
-// CHECK-PATCHES-NEXT: 1a010: b #-16420
+// CHECK-PATCHES: 00029010 <__CortexA8657417_24FFE>:
+// CHECK-PATCHES-NEXT: 29010: b #-16420
-// CHECK-PATCHES: 0001a014 <__CortexA8657417_16FFE>:
-// CHECK-PATCHES-NEXT: 1a014: b.w #-16406
+// CHECK-PATCHES: 00029014 <__CortexA8657417_25FFE>:
+// CHECK-PATCHES-NEXT: 29014: b.w #-16406
-// CHECK-PATCHES: 0001a018 <__CortexA8657417_17FFE>:
-// CHECK-PATCHES-NEXT: 1a018: b.w #-12314
+// CHECK-PATCHES: 00029018 <__CortexA8657417_26FFE>:
+// CHECK-PATCHES-NEXT: 29018: b.w #-12314
-// CHECK-PATCHES: 0001a01c <__CortexA8657417_18FFE>:
-// CHECK-PATCHES-NEXT: 1a01c: b.w #-8222
+// CHECK-PATCHES: 0002901c <__CortexA8657417_27FFE>:
+// CHECK-PATCHES-NEXT: 2901c: b.w #-8222
-// CHECK-PATCHES: 0001a020 <__CortexA8657417_19FFE>:
-// CHECK-PATCHES-NEXT: 1a020: b #-52
+// CHECK-PATCHES: 00029020 <__CortexA8657417_28FFE>:
+// CHECK-PATCHES-NEXT: 29020: b #-52
diff --git a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
index 12485297dbb1..183b397733e3 100644
--- a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
+++ b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s
@@ -22,13 +22,13 @@ thumb_target:
b.w thumb_target
/// Expect thunk and patch to be inserted here
-// CHECK: 00003004 <__ThumbV7PILongThunk_arm_func>:
-// CHECK-NEXT: 3004: movw r12, #4088
-// CHECK-NEXT: movt r12, #256
-// CHECK-NEXT: add r12, pc
-// CHECK-NEXT: bx r12
-// CHECK: 00004004 <__CortexA8657417_2FFE>:
-// CHECK-NEXT: 4004: b.w #-8196
+// CHECK: 00012004 <__ThumbV7PILongThunk_arm_func>:
+// CHECK-NEXT: 12004: movw r12, #4088
+// CHECK-NEXT: movt r12, #256
+// CHECK-NEXT: add r12, pc
+// CHECK-NEXT: bx r12
+// CHECK: 00013004 <__CortexA8657417_11FFE>:
+// CHECK-NEXT: 13004: b.w #-8196
.section .text.02
/// Take us over thunk section spacing
.space 16 * 1024 * 1024
diff --git a/lld/test/ELF/arm-fpic-got.s b/lld/test/ELF/arm-fpic-got.s
index 6d9eb4b0326e..8a7bb663030a 100644
--- a/lld/test/ELF/arm-fpic-got.s
+++ b/lld/test/ELF/arm-fpic-got.s
@@ -36,7 +36,7 @@ val:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12128
+// CHECK-NEXT: Address: 0x30128
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Link:
@@ -45,7 +45,7 @@ val:
// CHECK-NEXT: EntrySize:
// SYMBOLS: Name: val
-// SYMBOLS-NEXT: Value: 0x1312C
+// SYMBOLS-NEXT: Value: 0x4012C
// SYMBOLS-NEXT: Size: 4
// SYMBOLS-NEXT: Binding: Global
// SYMBOLS-NEXT: Type: Object
@@ -55,10 +55,10 @@ val:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
// CODE-NEXT: <_start>:
-// CODE-NEXT: 11114: ldr r0, [pc, #8]
-// CODE-NEXT: 11118: ldr r0, [pc, r0]
-// CODE-NEXT: 1111c: ldr r0, [r0]
-// CODE-NEXT: 11120: bx lr
+// CODE-NEXT: 20114: ldr r0, [pc, #8]
+// CODE-NEXT: 20118: ldr r0, [pc, r0]
+// CODE-NEXT: 2011c: ldr r0, [r0]
+// CODE-NEXT: 20120: bx lr
// CODE: <$d.1>:
// 0x11124 + 0x1008 + 8 = 0x12128 = .got
-// CODE-NEXT: 11124: 08 10 00 00
+// CODE-NEXT: 20124: 08 00 01 00
diff --git a/lld/test/ELF/arm-gnu-ifunc-plt.s b/lld/test/ELF/arm-gnu-ifunc-plt.s
index 35e2fd7b31b8..0a415c936755 100644
--- a/lld/test/ELF/arm-gnu-ifunc-plt.s
+++ b/lld/test/ELF/arm-gnu-ifunc-plt.s
@@ -10,75 +10,75 @@
// Check that the IRELATIVE relocations are last in the .got
// CHECK: Relocations [
// CHECK-NEXT: Section (5) .rel.dyn {
-// CHECK-NEXT: 0x122E0 R_ARM_GLOB_DAT bar2 0x0
-// CHECK-NEXT: 0x122E4 R_ARM_GLOB_DAT zed2 0x0
-// CHECK-NEXT: 0x122E8 R_ARM_IRELATIVE - 0x0
-// CHECK-NEXT: 0x122EC R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT: 0x302E0 R_ARM_GLOB_DAT bar2 0x0
+// CHECK-NEXT: 0x302E4 R_ARM_GLOB_DAT zed2 0x0
+// CHECK-NEXT: 0x302E8 R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT: 0x302EC R_ARM_IRELATIVE - 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Section (6) .rel.plt {
-// CHECK-NEXT: 0x132FC R_ARM_JUMP_SLOT bar2 0x0
-// CHECK-NEXT: 0x13300 R_ARM_JUMP_SLOT zed2 0x0
+// CHECK-NEXT: 0x402FC R_ARM_JUMP_SLOT bar2 0x0
+// CHECK-NEXT: 0x40300 R_ARM_JUMP_SLOT zed2 0x0
// CHECK-NEXT: }
// CHECK-NEXT: ]
// Check that the GOT entries refer back to the ifunc resolver
// GOTPLT: Contents of section .got:
-// GOTPLT-NEXT: 122e0 00000000 00000000 dc110100 e0110100
+// GOTPLT-NEXT: 302e0 00000000 00000000 dc010200 e0010200
// GOTPLT: Contents of section .got.plt:
-// GOTPLT-NEXT: 132f0 00000000 00000000 00000000 00120100
-// GOTPLT-NEXT: 13300 00120100
+// GOTPLT-NEXT: 402f0 00000000 00000000 00000000 00020200
+// GOTPLT-NEXT: 40300 00020200
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
// DISASM-NEXT: <foo>:
-// DISASM-NEXT: 111dc: bx lr
+// DISASM-NEXT: 201dc: bx lr
// DISASM: <bar>:
-// DISASM-NEXT: 111e0: bx lr
+// DISASM-NEXT: 201e0: bx lr
// DISASM: <_start>:
-// DISASM-NEXT: 111e4: bl #84
-// DISASM-NEXT: 111e8: bl #96
+// DISASM-NEXT: 201e4: bl #84
+// DISASM-NEXT: 201e8: bl #96
// DISASM: <$d.1>:
-// DISASM-NEXT: 111ec: 00 00 00 00 .word 0x00000000
-// DISASM-NEXT: 111f0: 04 00 00 00 .word 0x00000004
-// DISASM: 111f4: bl #36
-// DISASM-NEXT: 111f8: bl #48
+// DISASM-NEXT: 201ec: 00 00 00 00 .word 0x00000000
+// DISASM-NEXT: 201f0: 04 00 00 00 .word 0x00000004
+// DISASM: 201f4: bl #36
+// DISASM-NEXT: 201f8: bl #48
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
// DISASM-NEXT: <$a>:
-// DISASM-NEXT: 11200: str lr, [sp, #-4]!
-// DISASM-NEXT: 11204: add lr, pc, #0, #12
-// DISASM-NEXT: 11208: add lr, lr, #8192
-// DISASM-NEXT: 1120c: ldr pc, [lr, #236]!
+// DISASM-NEXT: 20200: str lr, [sp, #-4]!
+// DISASM-NEXT: 20204: add lr, pc, #0, #12
+// DISASM-NEXT: 20208: add lr, lr, #32
+// DISASM-NEXT: 2020c: ldr pc, [lr, #236]!
// DISASM: <$d>:
-// DISASM-NEXT: 11210: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM-NEXT: 11214: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM-NEXT: 11218: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DISASM-NEXT: 1121c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 20210: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 20214: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 20218: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 2021c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: <$a>:
-// DISASM-NEXT: 11220: add r12, pc, #0, #12
-// DISASM-NEXT: 11224: add r12, r12, #8192
-// DISASM-NEXT: 11228: ldr pc, [r12, #212]!
+// DISASM-NEXT: 20220: add r12, pc, #0, #12
+// DISASM-NEXT: 20224: add r12, r12, #32
+// DISASM-NEXT: 20228: ldr pc, [r12, #212]!
// DISASM: <$d>:
-// DISASM-NEXT: 1122c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 2022c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: <$a>:
-// DISASM-NEXT: 11230: add r12, pc, #0, #12
-// DISASM-NEXT: 11234: add r12, r12, #8192
-// DISASM-NEXT: 11238: ldr pc, [r12, #200]!
+// DISASM-NEXT: 20230: add r12, pc, #0, #12
+// DISASM-NEXT: 20234: add r12, r12, #32
+// DISASM-NEXT: 20238: ldr pc, [r12, #200]!
// DISASM: <$d>:
-// DISASM-NEXT: 1123c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 2023c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: <$a>:
-// DISASM-NEXT: 11240: add r12, pc, #0, #12
-// DISASM-NEXT: 11244: add r12, r12, #4096
-// DISASM-NEXT: 11248: ldr pc, [r12, #160]!
+// DISASM-NEXT: 20240: add r12, pc, #0, #12
+// DISASM-NEXT: 20244: add r12, r12, #16
+// DISASM-NEXT: 20248: ldr pc, [r12, #160]!
// DISASM: <$d>:
-// DISASM-NEXT: 1124c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 2024c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: <$a>:
-// DISASM-NEXT: 11250: add r12, pc, #0, #12
-// DISASM-NEXT: 11254: add r12, r12, #4096
-// DISASM-NEXT: 11258: ldr pc, [r12, #148]!
+// DISASM-NEXT: 20250: add r12, pc, #0, #12
+// DISASM-NEXT: 20254: add r12, r12, #16
+// DISASM-NEXT: 20258: ldr pc, [r12, #148]!
// DISASM: <$d>:
-// DISASM-NEXT: 1125c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 2025c: d4 d4 d4 d4 .word 0xd4d4d4d4
.syntax unified
.text
diff --git a/lld/test/ELF/arm-gnu-ifunc.s b/lld/test/ELF/arm-gnu-ifunc.s
index 916ea2ccfc7e..71b80a1840be 100644
--- a/lld/test/ELF/arm-gnu-ifunc.s
+++ b/lld/test/ELF/arm-gnu-ifunc.s
@@ -43,7 +43,7 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_EXECINSTR
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x11130
+// CHECK-NEXT: Address: 0x20130
// CHECK-NEXT: Offset: 0x130
// CHECK-NEXT: Size: 32
// CHECK: Index: 4
@@ -53,13 +53,13 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12150
+// CHECK-NEXT: Address: 0x30150
// CHECK-NEXT: Offset: 0x150
// CHECK-NEXT: Size: 8
// CHECK: Relocations [
// CHECK-NEXT: Section (1) .rel.dyn {
-// CHECK-NEXT: 0x12150 R_ARM_IRELATIVE
-// CHECK-NEXT: 0x12154 R_ARM_IRELATIVE
+// CHECK-NEXT: 0x30150 R_ARM_IRELATIVE
+// CHECK-NEXT: 0x30154 R_ARM_IRELATIVE
// CHECK-NEXT: }
// CHECK-NEXT: ]
// CHECK: Symbol {
@@ -86,7 +86,7 @@ _start:
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start
-// CHECK-NEXT: Value: 0x1110C
+// CHECK-NEXT: Value: 0x2010C
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: None
@@ -95,7 +95,7 @@ _start:
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: bar
-// CHECK-NEXT: Value: 0x11108
+// CHECK-NEXT: Value: 0x20108
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -104,7 +104,7 @@ _start:
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: foo
-// CHECK-NEXT: Value: 0x11104
+// CHECK-NEXT: Value: 0x20104
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -115,31 +115,31 @@ _start:
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
// DISASM-NEXT: <foo>:
-// DISASM-NEXT: 11104: bx lr
+// DISASM-NEXT: 20104: bx lr
// DISASM: <bar>:
-// DISASM-NEXT: 11108: bx lr
+// DISASM-NEXT: 20108: bx lr
// DISASM: <_start>:
-// DISASM-NEXT: 1110c: bl #28
-// DISASM-NEXT: 11110: bl #40
+// DISASM-NEXT: 2010c: bl #28
+// DISASM-NEXT: 20110: bl #40
// 1 * 65536 + 244 = 0x100f4 __rel_iplt_start
-// DISASM-NEXT: 11114: movw r0, #244
-// DISASM-NEXT: 11118: movt r0, #1
+// DISASM-NEXT: 20114: movw r0, #244
+// DISASM-NEXT: 20118: movt r0, #1
// 1 * 65536 + 260 = 0x10104 __rel_iplt_end
-// DISASM-NEXT: 1111c: movw r0, #260
-// DISASM-NEXT: 11120: movt r0, #1
+// DISASM-NEXT: 2011c: movw r0, #260
+// DISASM-NEXT: 20120: movt r0, #1
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .iplt:
// DISASM-EMPTY:
// DISASM-NEXT: <$a>:
-// DISASM-NEXT: 11130: add r12, pc, #0, #12
-// DISASM-NEXT: 11134: add r12, r12, #4096
-// DISASM-NEXT: 11138: ldr pc, [r12, #24]!
+// DISASM-NEXT: 20130: add r12, pc, #0, #12
+// DISASM-NEXT: 20134: add r12, r12, #16
+// DISASM-NEXT: 20138: ldr pc, [r12, #24]!
// DISASM: <$d>:
-// DISASM-NEXT: 1113c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 2013c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DISASM: <$a>:
-// DISASM-NEXT: 11140: add r12, pc, #0, #12
-// DISASM-NEXT: 11144: add r12, r12, #4096
-// DISASM-NEXT: 11148: ldr pc, [r12, #12]!
+// DISASM-NEXT: 20140: add r12, pc, #0, #12
+// DISASM-NEXT: 20144: add r12, r12, #16
+// DISASM-NEXT: 20148: ldr pc, [r12, #12]!
// DISASM: <$d>:
-// DISASM-NEXT: 1114c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DISASM-NEXT: 2014c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-got-relative.s b/lld/test/ELF/arm-got-relative.s
index 32a99491d886..2ae32349877b 100644
--- a/lld/test/ELF/arm-got-relative.s
+++ b/lld/test/ELF/arm-got-relative.s
@@ -28,10 +28,10 @@ function:
bx lr
// CHECK: Dynamic Relocations {
-// CHECK-NEXT: 0x220C R_ARM_GLOB_DAT function 0x0
+// CHECK-NEXT: 0x2020C R_ARM_GLOB_DAT function 0x0
// CHECK: Name: _GLOBAL_OFFSET_TABLE_
-// CHECK-NEXT: Value: 0x220C
+// CHECK-NEXT: Value: 0x2020C
// CHECK-NEXT: Size:
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -43,12 +43,12 @@ function:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
// CODE-NEXT: <_start>:
-// CODE-NEXT: 11a0: 08 30 9f e5 ldr r3, [pc, #8]
-// CODE-NEXT: 11a4: 08 20 9f e5 ldr r2, [pc, #8]
-// CODE-NEXT: 11a8: 03 00 8f e0 add r0, pc, r3
-// CODE-NEXT: 11ac: 1e ff 2f e1 bx lr
+// CODE-NEXT: 101a0: 08 30 9f e5 ldr r3, [pc, #8]
+// CODE-NEXT: 101a4: 08 20 9f e5 ldr r2, [pc, #8]
+// CODE-NEXT: 101a8: 03 00 8f e0 add r0, pc, r3
+// CODE-NEXT: 101ac: 1e ff 2f e1 bx lr
// CODE: <$d.1>:
// (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c
-// CODE-NEXT: 11b0: 5c 10 00 00
+// CODE-NEXT: 101b0: 5c 00 01 00
// (Got(function) - GotBase = 0x0
-// CODE-NEXT: 11b4: 00 00 00 00
+// CODE-NEXT: 101b4: 00 00 00 00
diff --git a/lld/test/ELF/arm-gotoff.s b/lld/test/ELF/arm-gotoff.s
index dd64d93b256d..0a6ea3ab0dad 100644
--- a/lld/test/ELF/arm-gotoff.s
+++ b/lld/test/ELF/arm-gotoff.s
@@ -12,7 +12,7 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12124
+// CHECK-NEXT: Address: 0x30124
// CHECK-NEXT: Offset: 0x124
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Link:
@@ -25,7 +25,7 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x13124
+// CHECK-NEXT: Address: 0x40124
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 20
// CHECK-NEXT: Link:
@@ -36,7 +36,7 @@
// CHECK: Symbol {
// CHECK: Name: bar
-// CHECK-NEXT: Value: 0x13124
+// CHECK-NEXT: Value: 0x40124
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -45,7 +45,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: obj
-// CHECK-NEXT: Value: 0x1312E
+// CHECK-NEXT: Value: 0x4012E
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
diff --git a/lld/test/ELF/arm-icf-exidx.s b/lld/test/ELF/arm-icf-exidx.s
index ba659b630986..27ebad6daf92 100644
--- a/lld/test/ELF/arm-icf-exidx.s
+++ b/lld/test/ELF/arm-icf-exidx.s
@@ -23,12 +23,12 @@ __aeabi_unwind_cpp_pr0:
bx lr
// CHECK: Contents of section .ARM.exidx:
-// CHECK-NEXT: 100d4 18100000 b0b0b080 14100000 01000000
+// CHECK-NEXT: 100d4 18000100 b0b0b080 14000100 01000000
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <g>:
-// CHECK-NEXT: 110ec: 1e ff 2f e1 bx lr
+// CHECK-NEXT: 200ec: 1e ff 2f e1 bx lr
// CHECK: <__aeabi_unwind_cpp_pr0>:
-// CHECK-NEXT: 110f0: 00 f0 20 e3 nop
-// CHECK-NEXT: 110f4: 1e ff 2f e1 bx lr
+// CHECK-NEXT: 200f0: 00 f0 20 e3 nop
+// CHECK-NEXT: 200f4: 1e ff 2f e1 bx lr
diff --git a/lld/test/ELF/arm-mov-relocs.s b/lld/test/ELF/arm-mov-relocs.s
index 50a36a793d82..7b6163cbfff7 100644
--- a/lld/test/ELF/arm-mov-relocs.s
+++ b/lld/test/ELF/arm-mov-relocs.s
@@ -28,7 +28,7 @@ _start:
movw r4, :lower16:label3 + 4
// CHECK-LABEL: Disassembly of section .R_ARM_MOVW_ABS_NC
// CHECK-EMPTY:
-// CHECK: 12000: movw r0, #0
+// CHECK: 21000: movw r0, #0
// CHECK: movw r1, #4
// CHECK: movw r2, #12
// CHECK: movw r3, #65532
@@ -44,12 +44,12 @@ _start:
movt r4, :upper16:label3 + 4
// CHECK-LABEL: Disassembly of section .R_ARM_MOVT_ABS
// CHECK-EMPTY:
-// CHECK: 12100: movt r0, #2
-// CHECK: movt r1, #2
-// CHECK: movt r2, #2
-// CHECK: movt r3, #2
+// CHECK: 21100: movt r0, #4
+// CHECK: movt r1, #4
+// CHECK: movt r2, #4
+// CHECK: movt r3, #4
/// :upper16:label3 + 4 = :upper16:0x30000 = 3
-// CHECK: movt r4, #3
+// CHECK: movt r4, #5
.section .R_ARM_MOVW_PREL_NC, "ax",%progbits
.align 8
@@ -61,15 +61,15 @@ _start:
// CHECK-LABEL: Disassembly of section .R_ARM_MOVW_PREL_NC
// CHECK-EMPTY:
/// :lower16:label - . = 56832
-// CHECK: 12200: movw r0, #56832
+// CHECK: 21200: movw r0, #60928
/// :lower16:label1 - . = 56832
-// CHECK: movw r1, #56832
-/// :lower16:label2 - . + 4 = 56836
-// CHECK: movw r2, #56836
-/// :lower16:label3 - . = 56816
-// CHECK: movw r3, #56816
-/// :lower16:label3 - . + 0x2214 = :lower16:0x20000 = 0
-// CHECK: movw r4, #0
+// CHECK: movw r1, #60928
+/// :lower16:label2 - . + 4 = 60932
+// CHECK: movw r2, #60932
+/// :lower16:label3 - . = 60912
+// CHECK: movw r3, #60912
+/// :lower16:label3 - . + 0x2214 = :lower16:0x20000 = 4096
+// CHECK: movw r4, #4096
.section .R_ARM_MOVT_PREL, "ax",%progbits
.align 8
@@ -80,16 +80,16 @@ _start:
movt r4, :upper16:label3 + 0x2314 - .
// CHECK-LABEL: Disassembly of section .R_ARM_MOVT_PREL
// CHECK-EMPTY:
-/// :upper16:label - . = :upper16:0xdd00 = 0
-// CHECK: 12300: movt r0, #0
-/// :upper16:label1 - . = :upper16:0xdd00 = 0
-// CHECK: movt r1, #0
-/// :upper16:label2 - . + 4 = :upper16:0xdd04 = 0
-// CHECK: movt r2, #0
-/// :upper16:label3 - . = :upper16:0x1dcf0 = 1
-// CHECK: movt r3, #1
-/// :upper16:label3 - . + 0x2314 = :upper16:0x20000 = 2
-// CHECK: movt r4, #2
+/// :upper16:label - . = :upper16:0xdd00 = 1
+// CHECK: 21300: movt r0, #1
+/// :upper16:label1 - . = :upper16:0xdd00 = 1
+// CHECK: movt r1, #1
+/// :upper16:label2 - . + 4 = :upper16:0xdd04 = 1
+// CHECK: movt r2, #1
+/// :upper16:label3 - . = :upper16:0x1dcf0 = 2
+// CHECK: movt r3, #2
+/// :upper16:label3 - . + 0x2314 = :upper16:0x20000 = 3
+// CHECK: movt r4, #3
.section .R_ARM_MOVW_BREL_NC, "ax",%progbits
.align 8
@@ -102,7 +102,7 @@ _start:
// CHECK-EMPTY:
// SB = .destination
/// :lower16:label - SB = 0
-// CHECK: 12400: movw r0, #0
+// CHECK: 21400: movw r0, #0
/// :lower16:label1 - SB = 4
// CHECK: movw r1, #4
/// :lower16:label2 - SB = 8
@@ -123,7 +123,7 @@ _start:
// CHECK-EMPTY:
// SB = .destination
/// :upper16:label - SB = 0
-// CHECK: 12500: movt r0, #0
+// CHECK: 21500: movt r0, #0
/// :upper16:label1 - SB = 0
// CHECK: movt r1, #0
/// :upper16:label2 - SB = 0
@@ -142,7 +142,7 @@ _start:
movw r4, :lower16:label3 + 4
// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVW_ABS_NC
// CHECK-EMPTY:
-// CHECK: 12600: movw r0, #0
+// CHECK: 21600: movw r0, #0
// CHECK: movw r1, #4
// CHECK: movw r2, #12
// CHECK: movw r3, #65532
@@ -157,11 +157,11 @@ _start:
movt r4, :upper16:label3 + 4
// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVT_ABS
// CHECK-EMPTY:
-// CHECK: 12700: movt r0, #2
-// CHECK: movt r1, #2
-// CHECK: movt r2, #2
-// CHECK: movt r3, #2
-// CHECK: movt r4, #3
+// CHECK: 21700: movt r0, #4
+// CHECK: movt r1, #4
+// CHECK: movt r2, #4
+// CHECK: movt r3, #4
+// CHECK: movt r4, #5
.section .R_ARM_THM_MOVW_PREL_NC, "ax",%progbits
.align 8
@@ -172,16 +172,16 @@ _start:
movw r4, :lower16:label3 + 0x2814 - .
// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVW_PREL_NC
// CHECK-EMPTY:
-/// :lower16:label - . = 55296
-// CHECK: 12800: movw r0, #55296
-/// :lower16:label1 - . = 55296
-// CHECK: movw r1, #55296
-/// :lower16:label2 - . + 4 = 55300
-// CHECK: movw r2, #55300
-/// :lower16:label3 - . = 55280
-// CHECK: movw r3, #55280
+/// :lower16:label - . = 59392
+// CHECK: 21800: movw r0, #59392
+/// :lower16:label1 - . = 59392
+// CHECK: movw r1, #59392
+/// :lower16:label2 - . + 4 = 59396
+// CHECK: movw r2, #59396
+/// :lower16:label3 - . = 59376
+// CHECK: movw r3, #59376
/// :lower16:label3 - . + 0x2814 = 0x20000
-// CHECK: movw r4, #0
+// CHECK: movw r4, #4096
.section .R_ARM_THM_MOVT_PREL, "ax",%progbits
.align 8
@@ -192,16 +192,16 @@ _start:
movt r4, :upper16:label3 + 0x2914 - .
// CHECK-LABEL: Disassembly of section .R_ARM_THM_MOVT_PREL
// CHECK-EMPTY:
-/// :upper16:label - . = :upper16:0xd700 = 0
-// CHECK: 12900: movt r0, #0
-/// :upper16:label1 - . = :upper16:0xd700 = 0
-// CHECK: movt r1, #0
-/// :upper16:label2 - . + 4 = :upper16:0xd704 = 0
-// CHECK: movt r2, #0
-/// :upper16:label3 - . = :upper16:0x1d6f0 = 1
-// CHECK: movt r3, #1
-/// :upper16:label3 - . + 0x2914 = :upper16:0x20000 = 2
-// CHECK: movt r4, #2
+/// :upper16:label - . = :upper16:0xd700 = 1
+// CHECK: 21900: movt r0, #1
+/// :upper16:label1 - . = :upper16:0xd700 = 1
+// CHECK: movt r1, #1
+/// :upper16:label2 - . + 4 = :upper16:0xd704 = 1
+// CHECK: movt r2, #1
+/// :upper16:label3 - . = :upper16:0x1d6f0 = 2
+// CHECK: movt r3, #2
+/// :upper16:label3 - . + 0x2914 = :upper16:0x20000 = 3
+// CHECK: movt r4, #3
.section .R_ARM_THM_MOVW_BREL_NC, "ax",%progbits
.align 8
@@ -214,7 +214,7 @@ _start:
// CHECK-EMPTY:
// SB = .destination
/// :lower16:label - SB = 0
-// CHECK: 12a00: movw r0, #0
+// CHECK: 21a00: movw r0, #0
/// :lower16:label1 - SB = 4
// CHECK: movw r1, #4
/// :lower16:label2 - SB = 8
@@ -235,7 +235,7 @@ _start:
// CHECK-EMPTY:
/// SB = .destination
/// :upper16:label - SB = 0
-// CHECK: 12b00: movt r0, #0
+// CHECK: 21b00: movt r0, #0
/// :upper16:label1 - SB = 0
// CHECK: movt r1, #0
/// :upper16:label2 - SB = 0
diff --git a/lld/test/ELF/arm-pie-relative.s b/lld/test/ELF/arm-pie-relative.s
index 1767bc9dfbe8..e0758895a9db 100644
--- a/lld/test/ELF/arm-pie-relative.s
+++ b/lld/test/ELF/arm-pie-relative.s
@@ -19,7 +19,7 @@ sym:
// CHECK: Relocations [
// CHECK-NEXT: Section (5) .rel.dyn {
-// CHECK-NEXT: 0x21DC R_ARM_RELATIVE
+// CHECK-NEXT: 0x201DC R_ARM_RELATIVE
// GOT: section '.got':
-// GOT-NEXT: 0x000021dc e0310000
+// GOT-NEXT: 0x000201dc e0010300
diff --git a/lld/test/ELF/arm-plt-reloc.s b/lld/test/ELF/arm-plt-reloc.s
index 7cb597ffea78..3adee648dad5 100644
--- a/lld/test/ELF/arm-plt-reloc.s
+++ b/lld/test/ELF/arm-plt-reloc.s
@@ -22,68 +22,68 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <func1>:
-// CHECK-NEXT: 110b4: bx lr
+// CHECK-NEXT: 200b4: bx lr
// CHECK: <func2>:
-// CHECK-NEXT: 110b8: bx lr
+// CHECK-NEXT: 200b8: bx lr
// CHECK: <func3>:
-// CHECK-NEXT: 110bc: bx lr
+// CHECK-NEXT: 200bc: bx lr
// CHECK: <_start>:
-// CHECK-NEXT: 110c0: b #-20 <func1>
-// CHECK-NEXT: 110c4: bl #-20 <func2>
-// CHECK-NEXT: 110c8: beq #-20 <func3>
+// CHECK-NEXT: 200c0: b #-20 <func1>
+// CHECK-NEXT: 200c4: bl #-20 <func2>
+// CHECK-NEXT: 200c8: beq #-20 <func3>
// Expect PLT entries as symbols can be preempted
// The .got.plt and .plt displacement is small so we can use small PLT entries.
// DSO: Disassembly of section .text:
// DSO-EMPTY:
// DSO-NEXT: <func1>:
-// DSO-NEXT: 1214: bx lr
+// DSO-NEXT: 10214: bx lr
// DSO: <func2>:
-// DSO-NEXT: 1218: bx lr
+// DSO-NEXT: 10218: bx lr
// DSO: <func3>:
-// DSO-NEXT: 121c: bx lr
+// DSO-NEXT: 1021c: bx lr
// DSO: <_start>:
-// S(0x1214) - P(0x1220) + A(-8) = 0x2c = 32
-// DSO-NEXT: 1220: b #40
-// S(0x1218) - P(0x1224) + A(-8) = 0x38 = 56
-// DSO-NEXT: 1224: bl #52
-// S(0x121c) - P(0x1228) + A(-8) = 0x44 = 68
-// DSO-NEXT: 1228: beq #64
+// S(0x10214) - P(0x10220) + A(-8) = 0x2c = 32
+// DSO-NEXT: 10220: b #40
+// S(0x10218) - P(0x10224) + A(-8) = 0x38 = 56
+// DSO-NEXT: 10224: bl #52
+// S(0x1021c) - P(0x10228) + A(-8) = 0x44 = 68
+// DSO-NEXT: 10228: beq #64
// DSO-EMPTY:
// DSO-NEXT: Disassembly of section .plt:
// DSO-EMPTY:
// DSO-NEXT: <$a>:
-// DSO-NEXT: 1230: str lr, [sp, #-4]!
-// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[2]
-// DSO-NEXT: 1234: add lr, pc, #0, #12
-// DSO-NEXT: 1238: add lr, lr, #8192
-// DSO-NEXT: 123c: ldr pc, [lr, #164]!
+// DSO-NEXT: 10230: str lr, [sp, #-4]!
+// (0x10234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[2]
+// DSO-NEXT: 10234: add lr, pc, #0, #12
+// DSO-NEXT: 10238: add lr, lr, #32
+// DSO-NEXT: 1023c: ldr pc, [lr, #164]!
// DSO: <$d>:
-// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 10244: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
-// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
-// DSO-NEXT: 1250: add r12, pc, #0, #12
-// DSO-NEXT: 1254: add r12, r12, #8192
-// DSO-NEXT: 1258: ldr pc, [r12, #140]!
+// (0x10250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
+// DSO-NEXT: 10250: add r12, pc, #0, #12
+// DSO-NEXT: 10254: add r12, r12, #32
+// DSO-NEXT: 10258: ldr pc, [r12, #140]!
// DSO: <$d>:
-// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
-// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
-// DSO-NEXT: 1260: add r12, pc, #0, #12
-// DSO-NEXT: 1264: add r12, r12, #8192
-// DSO-NEXT: 1268: ldr pc, [r12, #128]!
+// (0x10260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
+// DSO-NEXT: 10260: add r12, pc, #0, #12
+// DSO-NEXT: 10264: add r12, r12, #32
+// DSO-NEXT: 10268: ldr pc, [r12, #128]!
// DSO: <$d>:
-// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
-// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
-// DSO-NEXT: 1270: add r12, pc, #0, #12
-// DSO-NEXT: 1274: add r12, r12, #8192
-// DSO-NEXT: 1278: ldr pc, [r12, #116]!
+// (0x10270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
+// DSO-NEXT: 10270: add r12, pc, #0, #12
+// DSO-NEXT: 10274: add r12, r12, #32
+// DSO-NEXT: 10278: ldr pc, [r12, #116]!
// DSO: <$d>:
-// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSOREL: Name: .got.plt
@@ -92,7 +92,7 @@ _start:
// DSOREL-NEXT: SHF_ALLOC
// DSOREL-NEXT: SHF_WRITE
// DSOREL-NEXT: ]
-// DSOREL-NEXT: Address: 0x32D8
+// DSOREL-NEXT: Address: 0x302D8
// DSOREL-NEXT: Offset:
// DSOREL-NEXT: Size: 24
// DSOREL-NEXT: Link:
@@ -101,9 +101,9 @@ _start:
// DSOREL-NEXT: EntrySize:
// DSOREL: Relocations [
// DSOREL-NEXT: Section {{.*}} .rel.plt {
-// DSOREL-NEXT: 0x32E4 R_ARM_JUMP_SLOT func1 0x0
-// DSOREL-NEXT: 0x32E8 R_ARM_JUMP_SLOT func2 0x0
-// DSOREL-NEXT: 0x32EC R_ARM_JUMP_SLOT func3 0x0
+// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 0x0
+// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 0x0
+// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 0x0
// Test a large separation between the .plt and .got.plt
// The .got.plt and .plt displacement is large but still within the range
diff --git a/lld/test/ELF/arm-sbrel32.s b/lld/test/ELF/arm-sbrel32.s
index 0bb2c1eb033e..4ebafad3f61e 100644
--- a/lld/test/ELF/arm-sbrel32.s
+++ b/lld/test/ELF/arm-sbrel32.s
@@ -33,8 +33,8 @@ foo4: .space 4
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
-// CHECK-NEXT: 110d4: 1e ff 2f e1 bx lr
-// CHECK: 110d8: 00 00 00 00 .word 0x00000000
-// CHECK-NEXT: 110dc: 04 00 00 00 .word 0x00000004
-// CHECK-NEXT: 110e0: 08 00 00 00 .word 0x00000008
-// CHECK-NEXT: 110e4: 0c 00 00 00 .word 0x0000000c
+// CHECK-NEXT: 200d4: 1e ff 2f e1 bx lr
+// CHECK: 200d8: 00 00 00 00 .word 0x00000000
+// CHECK-NEXT: 200dc: 04 00 00 00 .word 0x00000004
+// CHECK-NEXT: 200e0: 08 00 00 00 .word 0x00000008
+// CHECK-NEXT: 200e4: 0c 00 00 00 .word 0x0000000c
diff --git a/lld/test/ELF/arm-target1.s b/lld/test/ELF/arm-target1.s
index 41bb0a3bc5fd..6d7151119498 100644
--- a/lld/test/ELF/arm-target1.s
+++ b/lld/test/ELF/arm-target1.s
@@ -26,11 +26,11 @@
// Force generation of $d.0 as section is not all data
nop
// RELATIVE: SYMBOL TABLE:
-// RELATIVE: 00001154 l .text 00000000 patatino
+// RELATIVE: 00010154 l .text 00000000 patatino
// RELATIVE: Disassembly of section .text:
// RELATIVE-EMPTY:
// RELATIVE: <$d.0>:
-// RELATIVE: 1150: 04 00 00 00 .word 0x00000004
+// RELATIVE: 10150: 04 00 00 00 .word 0x00000004
// ABS: can't create dynamic relocation R_ARM_TARGET1 against symbol: patatino in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output
// ABS: >>> defined in {{.*}}.o
diff --git a/lld/test/ELF/arm-target2.s b/lld/test/ELF/arm-target2.s
index 1ac7b9666342..5de23853dcd2 100644
--- a/lld/test/ELF/arm-target2.s
+++ b/lld/test/ELF/arm-target2.s
@@ -36,15 +36,15 @@ _ZTIi: .word 0
// CHECK: Contents of section .ARM.extab:
// 0x1012c + 0x2010 = 0x1213c = .got
-// CHECK-NEXT: 10124 14100000 b0b0b000 10200000
+// CHECK-NEXT: 10124 14000100 b0b0b000 10000200
// CHECK-ABS: Contents of section .ARM.extab:
// 0x100f0 = .rodata
-// CHECK-ABS-NEXT: 100e4 14100000 b0b0b000 f0000100
+// CHECK-ABS-NEXT: 100e4 14000100 b0b0b000 f0000100
// CHECK-REL: Contents of section .ARM.extab:
// 0x100ec + 4 = 0x100f0 = .rodata
-// CHECK-REL-NEXT: 100e4 14100000 b0b0b000 04000000
+// CHECK-REL-NEXT: 100e4 14000100 b0b0b000 04000000
// CHECK: Contents of section .rodata:
// CHECK-NEXT: 10130 00000000
@@ -57,4 +57,4 @@ _ZTIi: .word 0
// CHECK: Contents of section .got:
// 10130 = _ZTIi
-// CHECK-NEXT: 1213c 30010100
+// CHECK-NEXT: 3013c 30010100
diff --git a/lld/test/ELF/arm-thumb-adr.s b/lld/test/ELF/arm-thumb-adr.s
index adeac7d5f21b..67139179e608 100644
--- a/lld/test/ELF/arm-thumb-adr.s
+++ b/lld/test/ELF/arm-thumb-adr.s
@@ -31,14 +31,14 @@ target2:
nop
bx lr
-// CHECK: 000110b4 <_start>:
-// CHECK-NEXT: 110b4: adr r0, #0
-// CHECK-NEXT: 110b6: adr r1, #1020
+// CHECK: 000200b4 <_start>:
+// CHECK-NEXT: 200b4: adr r0, #0
+// CHECK-NEXT: 200b6: adr r1, #1020
-// CHECK: 000110b8 <target1>:
-// CHECK-NEXT: 110b8: nop
-// CHECK-NEXT: 110ba: bx lr
+// CHECK: 000200b8 <target1>:
+// CHECK-NEXT: 200b8: nop
+// CHECK-NEXT: 200ba: bx lr
-// CHECK: 000114b4 <target2>:
-// CHECK-NEXT: 114b4: nop
-// CHECK-NEXT: 114b6: bx lr
+// CHECK: 000204b4 <target2>:
+// CHECK-NEXT: 204b4: nop
+// CHECK-NEXT: 204b6: bx lr
diff --git a/lld/test/ELF/arm-thumb-interwork-abs.s b/lld/test/ELF/arm-thumb-interwork-abs.s
index 523660ad292f..6dd2b87e5690 100644
--- a/lld/test/ELF/arm-thumb-interwork-abs.s
+++ b/lld/test/ELF/arm-thumb-interwork-abs.s
@@ -27,12 +27,12 @@ thumb_caller:
blx sym
// WARN: branch and link relocation: R_ARM_THM_CALL to non STT_FUNC symbol: sym interworking not performed; consider using directive '.type sym, %function' to give symbol type STT_FUNC if interworking between ARM and Thumb is required
-// CHECK: 00012000 <arm_caller>:
-// CHECK-NEXT: 12000: b #4088
-// CHECK-NEXT: 12004: bl #4084
-// CHECK-NEXT: 12008: blx #4080
+// CHECK: 00021000 <arm_caller>:
+// CHECK-NEXT: 21000: b #-57352
+// CHECK-NEXT: 21004: bl #-57356
+// CHECK-NEXT: 21008: blx #-57360
-// CHECK: 0001200c <thumb_caller>:
-// CHECK-NEXT: 1200c: b.w #4080
-// CHECK-NEXT: 12010: bl #4076
-// CHECK-NEXT: 12014: blx #4076
+// CHECK: 0002100c <thumb_caller>:
+// CHECK-NEXT: 2100c: b.w #-57360
+// CHECK-NEXT: 21010: bl #-57364
+// CHECK-NEXT: 21014: blx #-57364
diff --git a/lld/test/ELF/arm-thumb-interwork-notfunc.s b/lld/test/ELF/arm-thumb-interwork-notfunc.s
index 40ef24ff7fcf..1cccf70b56df 100644
--- a/lld/test/ELF/arm-thumb-interwork-notfunc.s
+++ b/lld/test/ELF/arm-thumb-interwork-notfunc.s
@@ -94,48 +94,48 @@ thumb_caller:
blx thumb_func_with_notype
blx thumb_func_with_explicit_notype
-// CHECK: 00012008 <_start>:
-// CHECK-NEXT: 12008: b #-16
-// CHECK-NEXT: 1200c: b #-20
-// CHECK-NEXT: 12010: b #-24
-// CHECK-NEXT: 12014: b #-24
-// CHECK-NEXT: 12018: b #-28
-// CHECK-NEXT: 1201c: b #-32
-// CHECK-NEXT: 12020: bl #-40
-// CHECK-NEXT: 12024: bl #-44
-// CHECK-NEXT: 12028: bl #-48
-// CHECK-NEXT: 1202c: bl #-48
-// CHECK-NEXT: 12030: bl #-52
-// CHECK-NEXT: 12034: bl #-56
-// CHECK-NEXT: 12038: blx #-64
-// CHECK-NEXT: 1203c: blx #-68
-// CHECK-NEXT: 12040: blx #-72
-// CHECK-NEXT: 12044: blx #-72
-// CHECK-NEXT: 12048: blx #-76
-// CHECK-NEXT: 1204c: blx #-80
+// CHECK: 00021008 <_start>:
+// CHECK-NEXT: 21008: b #-16
+// CHECK-NEXT: 2100c: b #-20
+// CHECK-NEXT: 21010: b #-24
+// CHECK-NEXT: 21014: b #-24
+// CHECK-NEXT: 21018: b #-28
+// CHECK-NEXT: 2101c: b #-32
+// CHECK-NEXT: 21020: bl #-40
+// CHECK-NEXT: 21024: bl #-44
+// CHECK-NEXT: 21028: bl #-48
+// CHECK-NEXT: 2102c: bl #-48
+// CHECK-NEXT: 21030: bl #-52
+// CHECK-NEXT: 21034: bl #-56
+// CHECK-NEXT: 21038: blx #-64
+// CHECK-NEXT: 2103c: blx #-68
+// CHECK-NEXT: 21040: blx #-72
+// CHECK-NEXT: 21044: blx #-72
+// CHECK-NEXT: 21048: blx #-76
+// CHECK-NEXT: 2104c: blx #-80
-// CHECK: 00012050 <thumb_caller>:
-// CHECK-NEXT: 12050: b.w #-84
-// CHECK-NEXT: 12054: b.w #-88
-// CHECK-NEXT: 12058: b.w #-92
-// CHECK-NEXT: 1205c: b.w #-92
-// CHECK-NEXT: 12060: b.w #-96
-// CHECK-NEXT: 12064: b.w #-100
-// CHECK-NEXT: 12068: beq.w #-108
-// CHECK-NEXT: 1206c: beq.w #-112
-// CHECK-NEXT: 12070: beq.w #-116
-// CHECK-NEXT: 12074: beq.w #-116
-// CHECK-NEXT: 12078: beq.w #-120
-// CHECK-NEXT: 1207c: beq.w #-124
-// CHECK-NEXT: 12080: bl #-132
-// CHECK-NEXT: 12084: bl #-136
-// CHECK-NEXT: 12088: bl #-140
-// CHECK-NEXT: 1208c: bl #-140
-// CHECK-NEXT: 12090: bl #-144
-// CHECK-NEXT: 12094: bl #-148
-// CHECK-NEXT: 12098: blx #-156
-// CHECK-NEXT: 1209c: blx #-160
-// CHECK-NEXT: 120a0: blx #-164
-// CHECK-NEXT: 120a4: blx #-164
-// CHECK-NEXT: 120a8: blx #-168
-// CHECK-NEXT: 120ac: blx #-172
+// CHECK: 00021050 <thumb_caller>:
+// CHECK-NEXT: 21050: b.w #-84
+// CHECK-NEXT: 21054: b.w #-88
+// CHECK-NEXT: 21058: b.w #-92
+// CHECK-NEXT: 2105c: b.w #-92
+// CHECK-NEXT: 21060: b.w #-96
+// CHECK-NEXT: 21064: b.w #-100
+// CHECK-NEXT: 21068: beq.w #-108
+// CHECK-NEXT: 2106c: beq.w #-112
+// CHECK-NEXT: 21070: beq.w #-116
+// CHECK-NEXT: 21074: beq.w #-116
+// CHECK-NEXT: 21078: beq.w #-120
+// CHECK-NEXT: 2107c: beq.w #-124
+// CHECK-NEXT: 21080: bl #-132
+// CHECK-NEXT: 21084: bl #-136
+// CHECK-NEXT: 21088: bl #-140
+// CHECK-NEXT: 2108c: bl #-140
+// CHECK-NEXT: 21090: bl #-144
+// CHECK-NEXT: 21094: bl #-148
+// CHECK-NEXT: 21098: blx #-156
+// CHECK-NEXT: 2109c: blx #-160
+// CHECK-NEXT: 210a0: blx #-164
+// CHECK-NEXT: 210a4: blx #-164
+// CHECK-NEXT: 210a8: blx #-168
+// CHECK-NEXT: 210ac: blx #-172
diff --git a/lld/test/ELF/arm-thumb-interwork-shared.s b/lld/test/ELF/arm-thumb-interwork-shared.s
index dee44afc1153..45ebcf5d0816 100644
--- a/lld/test/ELF/arm-thumb-interwork-shared.s
+++ b/lld/test/ELF/arm-thumb-interwork-shared.s
@@ -19,17 +19,17 @@ sym1:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <sym1>:
-// CHECK-NEXT: 11e0: b.w #12 <__ThumbV7PILongThunk_elsewhere>
+// CHECK-NEXT: 101e0: b.w #12 <__ThumbV7PILongThunk_elsewhere>
// CHECK-NEXT: b.w #20 <__ThumbV7PILongThunk_weakref>
// CHECK-NEXT: blx #68
// CHECK-NEXT: blx #80
// CHECK: <__ThumbV7PILongThunk_elsewhere>:
-// CHECK-NEXT: 11f0: movw r12, #52
+// CHECK-NEXT: 101f0: movw r12, #52
// CHECK-NEXT: movt r12, #0
// CHECK-NEXT: add r12, pc
// CHECK-NEXT: bx r12
// CHECK: <__ThumbV7PILongThunk_weakref>:
-// CHECK-NEXT: 11fc: movw r12, #56
+// CHECK-NEXT: 101fc: movw r12, #56
// CHECK-NEXT: movt r12, #0
// CHECK-NEXT: add r12, pc
// CHECK-NEXT: bx r12
@@ -37,24 +37,24 @@ sym1:
// CHECK: Disassembly of section .plt:
// CHECK-EMPTY:
// CHECK-NEXT: <$a>:
-// CHECK-NEXT: 1210: str lr, [sp, #-4]!
+// CHECK-NEXT: 10210: str lr, [sp, #-4]!
// CHECK-NEXT: add lr, pc, #0, #12
-// CHECK-NEXT: add lr, lr, #8192
+// CHECK-NEXT: add lr, lr, #32
// CHECK-NEXT: ldr pc, [lr, #148]!
// CHECK: <$d>:
-// CHECK-NEXT: 1220: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 10220: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-NEXT: .word 0xd4d4d4d4
// CHECK-NEXT: .word 0xd4d4d4d4
// CHECK-NEXT: .word 0xd4d4d4d4
// CHECK: <$a>:
-// CHECK-NEXT: 1230: add r12, pc, #0, #12
-// CHECK-NEXT: add r12, r12, #8192
+// CHECK-NEXT: 10230: add r12, pc, #0, #12
+// CHECK-NEXT: add r12, r12, #32
// CHECK-NEXT: ldr pc, [r12, #124]!
// CHECK: <$d>:
-// CHECK-NEXT: 123c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 1023c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK: <$a>:
-// CHECK-NEXT: 1240: add r12, pc, #0, #12
-// CHECK-NEXT: add r12, r12, #8192
+// CHECK-NEXT: 10240: add r12, pc, #0, #12
+// CHECK-NEXT: add r12, r12, #32
// CHECK-NEXT: ldr pc, [r12, #112]!
// CHECK: <$d>:
-// CHECK-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s
index 1e397f7ef897..4d6e89df1811 100644
--- a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s
+++ b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s
@@ -27,34 +27,34 @@ _start:
bx lr
// CHECK: <_start>:
-// CHECK-NEXT: 12000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func>
-// CHECK-NEXT: 12004: 01 00 00 fa blx #4 <thumb_func>
-// CHECK-NEXT: 12008: 00 00 00 fa blx #0 <thumb_func>
-// CHECK-NEXT: 1200c: 1e ff 2f e1 bx lr
+// CHECK-NEXT: 21000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func>
+// CHECK-NEXT: 21004: 01 00 00 fa blx #4 <thumb_func>
+// CHECK-NEXT: 21008: 00 00 00 fa blx #0 <thumb_func>
+// CHECK-NEXT: 2100c: 1e ff 2f e1 bx lr
// CHECK: <thumb_func>:
-// CHECK-NEXT: 12010: 70 47 bx lr
+// CHECK-NEXT: 21010: 70 47 bx lr
// CHECK: <__ARMv5ABSLongThunk_thumb_func>:
-// CHECK-NEXT: 12014: 04 f0 1f e5 ldr pc, [pc, #-4]
+// CHECK-NEXT: 21014: 04 f0 1f e5 ldr pc, [pc, #-4]
// CHECK: <$d>:
-// CHECK-NEXT: 12018: 11 20 01 00 .word 0x00012011
+// CHECK-NEXT: 21018: 11 10 02 00 .word 0x00021011
// CHECK-PI: <_start>:
-// CHECK-PI-NEXT: 2000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func>
-// CHECK-PI-NEXT: 2004: 01 00 00 fa blx #4 <thumb_func>
-// CHECK-PI-NEXT: 2008: 00 00 00 fa blx #0 <thumb_func>
-// CHECK-PI-NEXT: 200c: 1e ff 2f e1 bx lr
+// CHECK-PI-NEXT: 11000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func>
+// CHECK-PI-NEXT: 11004: 01 00 00 fa blx #4 <thumb_func>
+// CHECK-PI-NEXT: 11008: 00 00 00 fa blx #0 <thumb_func>
+// CHECK-PI-NEXT: 1100c: 1e ff 2f e1 bx lr
// CHECK-PI: <thumb_func>:
-// CHECK-PI-NEXT: 2010: 70 47 bx lr
+// CHECK-PI-NEXT: 11010: 70 47 bx lr
// CHECK-PI: <__ARMV5PILongThunk_thumb_func>:
-// CHECK-PI-NEXT: 2014: 04 c0 9f e5 ldr r12, [pc, #4]
-// CHECK-PI-NEXT: 2018: 0c c0 8f e0 add r12, pc, r12
-// CHECK-PI-NEXT: 201c: 1c ff 2f e1 bx r12
+// CHECK-PI-NEXT: 11014: 04 c0 9f e5 ldr r12, [pc, #4]
+// CHECK-PI-NEXT: 11018: 0c c0 8f e0 add r12, pc, r12
+// CHECK-PI-NEXT: 1101c: 1c ff 2f e1 bx r12
// CHECK-PI: <$d>:
-// CHECK-PI-NEXT: 2020: f1 ff ff ff .word 0xfffffff1
+// CHECK-PI-NEXT: 11020: f1 ff ff ff .word 0xfffffff1
.section .text.1, "ax", %progbits
.thumb
diff --git a/lld/test/ELF/arm-thumb-ldrlit.s b/lld/test/ELF/arm-thumb-ldrlit.s
index 31eea197e1ad..761a2dee361d 100644
--- a/lld/test/ELF/arm-thumb-ldrlit.s
+++ b/lld/test/ELF/arm-thumb-ldrlit.s
@@ -31,14 +31,14 @@ target2:
nop
bx lr
-// CHECK: 000110b4 <_start>:
-// CHECK-NEXT: 110b4: ldr r0, [pc, #0]
-// CHECK-NEXT: 110b6: ldr r1, [pc, #1020]
+// CHECK: 000200b4 <_start>:
+// CHECK-NEXT: 200b4: ldr r0, [pc, #0]
+// CHECK-NEXT: 200b6: ldr r1, [pc, #1020]
-// CHECK: 000110b8 <target1>:
-// CHECK-NEXT: 110b8: nop
-// CHECK-NEXT: 110ba: bx lr
+// CHECK: 000200b8 <target1>:
+// CHECK-NEXT: 200b8: nop
+// CHECK-NEXT: 200ba: bx lr
-// CHECK: 000114b4 <target2>:
-// CHECK-NEXT: 114b4: nop
-// CHECK-NEXT: 114b6: bx lr
+// CHECK: 000204b4 <target2>:
+// CHECK-NEXT: 204b4: nop
+// CHECK-NEXT: 204b6: bx lr
diff --git a/lld/test/ELF/arm-thumb-no-undefined-thunk.s b/lld/test/ELF/arm-thumb-no-undefined-thunk.s
index 2fbca671e14e..77af78ce6817 100644
--- a/lld/test/ELF/arm-thumb-no-undefined-thunk.s
+++ b/lld/test/ELF/arm-thumb-no-undefined-thunk.s
@@ -20,6 +20,6 @@ _start:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// 0x110b8 = next instruction
-// CHECK: 110b4: {{.*}} bl #0
-// CHECK-NEXT: 110b8: {{.*}} b.w #0 <_start+0x8>
-// CHECK-NEXT: 110bc: {{.*}} b.w #0 <_start+0xc>
+// CHECK: 200b4: {{.*}} bl #0
+// CHECK-NEXT: 200b8: {{.*}} b.w #0 <_start+0x8>
+// CHECK-NEXT: 200bc: {{.*}} b.w #0 <_start+0xc>
diff --git a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s
index ba151c9b9db0..3c61ca1a54bd 100644
--- a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s
+++ b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s
@@ -89,7 +89,7 @@ far_nonpreemptible_alias:
// CHECK4-NEXT: <$a>:
// CHECK4-NEXT: 4000010: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK4-NEXT: 4000014: 00 e6 8f e2 add lr, pc, #0, #12
-// CHECK4-NEXT: 4000018: 02 ea 8e e2 add lr, lr, #8192
+// CHECK4-NEXT: 4000018: 20 ea 8e e2 add lr, lr, #32
// CHECK4-NEXT: 400001c: a4 f0 be e5 ldr pc, [lr, #164]!
// CHECK4: <$d>:
// CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4
@@ -98,19 +98,19 @@ far_nonpreemptible_alias:
// CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: <$a>:
// CHECK4-NEXT: 4000030: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK4-NEXT: 4000034: 02 ca 8c e2 add r12, r12, #8192
+// CHECK4-NEXT: 4000034: 20 ca 8c e2 add r12, r12, #32
// CHECK4-NEXT: 4000038: 8c f0 bc e5 ldr pc, [r12, #140]!
// CHECK4: <$d>:
// CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: <$a>:
// CHECK4-NEXT: 4000040: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK4-NEXT: 4000044: 02 ca 8c e2 add r12, r12, #8192
+// CHECK4-NEXT: 4000044: 20 ca 8c e2 add r12, r12, #32
// CHECK4-NEXT: 4000048: 80 f0 bc e5 ldr pc, [r12, #128]!
// CHECK4: <$d>:
// CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: <$a>:
// CHECK4-NEXT: 4000050: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK4-NEXT: 4000054: 02 ca 8c e2 add r12, r12, #8192
+// CHECK4-NEXT: 4000054: 20 ca 8c e2 add r12, r12, #32
// CHECK4-NEXT: 4000058: 74 f0 bc e5 ldr pc, [r12, #116]!
// CHECK4: <$d>:
// CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-thumb-plt-reloc.s b/lld/test/ELF/arm-thumb-plt-reloc.s
index f252852ec147..5d57a67156c7 100644
--- a/lld/test/ELF/arm-thumb-plt-reloc.s
+++ b/lld/test/ELF/arm-thumb-plt-reloc.s
@@ -25,19 +25,19 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <func1>:
-// CHECK-NEXT: 110b4: 70 47 bx lr
+// CHECK-NEXT: 200b4: 70 47 bx lr
// CHECK: <func2>:
-// CHECK-NEXT: 110b6: 70 47 bx lr
+// CHECK-NEXT: 200b6: 70 47 bx lr
// CHECK: <func3>:
-// CHECK-NEXT: 110b8: 70 47 bx lr
-// CHECK-NEXT: 110ba: d4 d4
+// CHECK-NEXT: 200b8: 70 47 bx lr
+// CHECK-NEXT: 200ba: d4 d4
// CHECK: <_start>:
-// . + 4 -12 = 0x110b4 = func1
-// CHECK-NEXT: 110bc: ff f7 fa ff bl #-12
-// . + 4 -14 = 0x110b6 = func2
-// CHECK-NEXT: 110c0: ff f7 f9 ff bl #-14
-// . + 4 -16 = 0x110b8 = func3
-// CHECK-NEXT: 110c4: ff f7 f8 ff bl #-16
+// . + 4 -12 = 0x200b4 = func1
+// CHECK-NEXT: 200bc: ff f7 fa ff bl #-12
+// . + 4 -14 = 0x200b6 = func2
+// CHECK-NEXT: 200c0: ff f7 f9 ff bl #-14
+// . + 4 -16 = 0x200b8 = func3
+// CHECK-NEXT: 200c4: ff f7 f8 ff bl #-16
// Expect PLT entries as symbols can be preempted
// .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble
@@ -45,54 +45,54 @@ _start:
// DSO: Disassembly of section .text:
// DSO-EMPTY:
// DSO-NEXT: <func1>:
-// DSO-NEXT: 1214: 70 47 bx lr
+// DSO-NEXT: 10214: 70 47 bx lr
// DSO: <func2>:
-// DSO-NEXT: 1216: 70 47 bx lr
+// DSO-NEXT: 10216: 70 47 bx lr
// DSO: <func3>:
-// DSO-NEXT: 1218: 70 47 bx lr
-// DSO-NEXT: 121a: d4 d4 bmi #-88
+// DSO-NEXT: 10218: 70 47 bx lr
+// DSO-NEXT: 1021a: d4 d4 bmi #-88
// DSO: <_start>:
-// . + 48 + 4 = 0x1250 = PLT func1
-// DSO-NEXT: 121c: 00 f0 18 e8 blx #48
-// . + 60 + 4 = 0x1260 = PLT func2
-// DSO-NEXT: 1220: 00 f0 1e e8 blx #60
-// . + 72 + 4 = 0x1270 = PLT func3
-// DSO-NEXT: 1224: 00 f0 24 e8 blx #72
+// . + 48 + 4 = 0x10250 = PLT func1
+// DSO-NEXT: 1021c: 00 f0 18 e8 blx #48
+// . + 60 + 4 = 0x10260 = PLT func2
+// DSO-NEXT: 10220: 00 f0 1e e8 blx #60
+// . + 72 + 4 = 0x10270 = PLT func3
+// DSO-NEXT: 10224: 00 f0 24 e8 blx #72
// DSO: Disassembly of section .plt:
// DSO-EMPTY:
// DSO-NEXT: <$a>:
-// DSO-NEXT: 1230: 04 e0 2d e5 str lr, [sp, #-4]!
-// (0x1234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[3]
-// DSO-NEXT: 1234: 00 e6 8f e2 add lr, pc, #0, #12
-// DSO-NEXT: 1238: 02 ea 8e e2 add lr, lr, #8192
-// DSO-NEXT: 123c: a4 f0 be e5 ldr pc, [lr, #164]!
+// DSO-NEXT: 10230: 04 e0 2d e5 str lr, [sp, #-4]!
+// (0x10234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[3]
+// DSO-NEXT: 10234: 00 e6 8f e2 add lr, pc, #0, #12
+// DSO-NEXT: 10238: 20 ea 8e e2 add lr, lr, #32
+// DSO-NEXT: 1023c: a4 f0 be e5 ldr pc, [lr, #164]!
// DSO: <$d>:
-// DSO-NEXT: 1240: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1244: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 1248: d4 d4 d4 d4 .word 0xd4d4d4d4
-// DSO-NEXT: 124c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 10244: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
-// (0x1250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
-// DSO-NEXT: 1250: 00 c6 8f e2 add r12, pc, #0, #12
-// DSO-NEXT: 1254: 02 ca 8c e2 add r12, r12, #8192
-// DSO-NEXT: 1258: 8c f0 bc e5 ldr pc, [r12, #140]!
+// (0x10250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4
+// DSO-NEXT: 10250: 00 c6 8f e2 add r12, pc, #0, #12
+// DSO-NEXT: 10254: 20 ca 8c e2 add r12, r12, #32
+// DSO-NEXT: 10258: 8c f0 bc e5 ldr pc, [r12, #140]!
// DSO: <$d>:
-// DSO-NEXT: 125c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
-// (0x1260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
-// DSO-NEXT: 1260: 00 c6 8f e2 add r12, pc, #0, #12
-// DSO-NEXT: 1264: 02 ca 8c e2 add r12, r12, #8192
-// DSO-NEXT: 1268: 80 f0 bc e5 ldr pc, [r12, #128]!
+// (0x10260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8
+// DSO-NEXT: 10260: 00 c6 8f e2 add r12, pc, #0, #12
+// DSO-NEXT: 10264: 20 ca 8c e2 add r12, r12, #32
+// DSO-NEXT: 10268: 80 f0 bc e5 ldr pc, [r12, #128]!
// DSO: <$d>:
-// DSO-NEXT: 126c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
-// (0x1270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
-// DSO-NEXT: 1270: 00 c6 8f e2 add r12, pc, #0, #12
-// DSO-NEXT: 1274: 02 ca 8c e2 add r12, r12, #8192
-// DSO-NEXT: 1278: 74 f0 bc e5 ldr pc, [r12, #116]!
+// (0x10270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec
+// DSO-NEXT: 10270: 00 c6 8f e2 add r12, pc, #0, #12
+// DSO-NEXT: 10274: 20 ca 8c e2 add r12, r12, #32
+// DSO-NEXT: 10278: 74 f0 bc e5 ldr pc, [r12, #116]!
// DSO: <$d>:
-// DSO-NEXT: 127c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSOREL: Name: .got.plt
// DSOREL-NEXT: Type: SHT_PROGBITS
@@ -100,7 +100,7 @@ _start:
// DSOREL-NEXT: SHF_ALLOC
// DSOREL-NEXT: SHF_WRITE
// DSOREL-NEXT: ]
-// DSOREL-NEXT: Address: 0x32D8
+// DSOREL-NEXT: Address: 0x302D8
// DSOREL-NEXT: Offset:
// DSOREL-NEXT: Size: 24
// DSOREL-NEXT: Link:
@@ -109,6 +109,6 @@ _start:
// DSOREL-NEXT: EntrySize:
// DSOREL: Relocations [
// DSOREL-NEXT: Section (5) .rel.plt {
-// DSOREL-NEXT: 0x32E4 R_ARM_JUMP_SLOT func1 0x0
-// DSOREL-NEXT: 0x32E8 R_ARM_JUMP_SLOT func2 0x0
-// DSOREL-NEXT: 0x32EC R_ARM_JUMP_SLOT func3 0x0
+// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 0x0
+// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 0x0
+// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 0x0
diff --git a/lld/test/ELF/arm-thumb-thunk-empty-pass.s b/lld/test/ELF/arm-thumb-thunk-empty-pass.s
index 271d88dcf9d7..35eecc49eda9 100644
--- a/lld/test/ELF/arm-thumb-thunk-empty-pass.s
+++ b/lld/test/ELF/arm-thumb-thunk-empty-pass.s
@@ -18,13 +18,13 @@ foo:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
-// CHECK-NEXT: 110b4: ff f7 fe ff bl #-4
+// CHECK-NEXT: 200b4: ff f7 fe ff bl #-4
// CHECK: <__Thumbv7ABSLongThunk__start>:
-// CHECK-NEXT: 110b8: ff f7 fc bf b.w #-8 <_start>
+// CHECK-NEXT: 200b8: ff f7 fc bf b.w #-8 <_start>
// CHECK: <__Thumbv7ABSLongThunk__start>:
-// CHECK: 10110bc: 41 f2 b5 0c movw r12, #4277
-// CHECK-NEXT: 10110c0: c0 f2 01 0c movt r12, #1
-// CHECK-NEXT: 10110c4: 60 47 bx r12
+// CHECK: 10200bc: 40 f2 b5 0c movw r12, #181
+// CHECK-NEXT: 10200c0: c0 f2 02 0c movt r12, #2
+// CHECK-NEXT: 10200c4: 60 47 bx r12
// CHECK: <foo>:
-// CHECK-NEXT: 10110c6: ff f7 f9 ff bl #-14
+// CHECK-NEXT: 10200c6: ff f7 f9 ff bl #-14
diff --git a/lld/test/ELF/arm-thumb-thunk-symbols.s b/lld/test/ELF/arm-thumb-thunk-symbols.s
index 976b3b2f38a2..e79998c0d0ae 100644
--- a/lld/test/ELF/arm-thumb-thunk-symbols.s
+++ b/lld/test/ELF/arm-thumb-thunk-symbols.s
@@ -25,18 +25,18 @@ arm_fn:
b thumb_fn
// CHECK: Name: __Thumbv7ABSLongThunk_arm_fn
-// CHECK-NEXT: Value: 0x13005
+// CHECK-NEXT: Value: 0x22005
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Local (0x0)
// CHECK-NEXT: Type: Function (0x2)
// CHECK: Name: __ARMv7ABSLongThunk_thumb_fn
-// CHECK-NEXT: Value: 0x13010
+// CHECK-NEXT: Value: 0x22010
// CHECK-NEXT: Size: 12
// CHECK-NEXT: Binding: Local (0x0)
// CHECK-NEXT: Type: Function (0x2)
// CHECK-PI: Name: __ThumbV7PILongThunk_arm_fn
-// CHECK-PI-NEXT: Value: 0x3005
+// CHECK-PI-NEXT: Value: 0x12005
// CHECK-PI-NEXT: Size: 12
// CHECK-PI-NEXT: Binding: Local (0x0)
// CHECK-PI-NEXT: Type: Function (0x2)
diff --git a/lld/test/ELF/arm-thumb-undefined-weak.s b/lld/test/ELF/arm-thumb-undefined-weak.s
index d56480575fdb..9c9626cfc4a9 100644
--- a/lld/test/ELF/arm-thumb-undefined-weak.s
+++ b/lld/test/ELF/arm-thumb-undefined-weak.s
@@ -3,9 +3,9 @@
// RUN: ld.lld %t -o %t2
// RUN: llvm-objdump --triple=thumbv7a-none-linux-gnueabi -d %t2 | FileCheck %s
-// Check that the ARM ABI rules for undefined weak symbols are applied.
-// Branch instructions are resolved to the next instruction. Relative
-// relocations are resolved to the place.
+/// Check that the ARM ABI rules for undefined weak symbols are applied.
+/// Branch instructions are resolved to the next instruction. Relative
+/// relocations are resolved to the place.
.syntax unified
@@ -15,30 +15,30 @@
.text
.global _start
_start:
-// R_ARM_THM_JUMP19
+/// R_ARM_THM_JUMP19
beq.w target
-// R_ARM_THM_JUMP24
+/// R_ARM_THM_JUMP24
b.w target
-// R_ARM_THM_CALL
+/// R_ARM_THM_CALL
bl target
-// R_ARM_THM_CALL with exchange
+/// R_ARM_THM_CALL with exchange
blx target
-// R_ARM_THM_MOVT_PREL
+/// R_ARM_THM_MOVT_PREL
movt r0, :upper16:target - .
-// R_ARM_THM_MOVW_PREL_NC
+/// R_ARM_THM_MOVW_PREL_NC
movw r0, :lower16:target - .
-// R_ARM_THM_ALU_PREL_11_0
+/// R_ARM_THM_ALU_PREL_11_0
adr r0, target
-// R_ARM_THM_PC12
+/// R_ARM_THM_PC12
ldr r0, target
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK: 110b4: {{.*}} beq.w #0 <_start+0x4>
-// CHECK-NEXT: 110b8: {{.*}} b.w #0 <_start+0x8>
-// CHECK-NEXT: 110bc: {{.*}} bl #0
-// blx is transformed into bl so we don't change state
-// CHECK-NEXT: 110c0: {{.*}} bl #0
-// CHECK-NEXT: 110c4: {{.*}} movt r0, #0
-// CHECK-NEXT: 110c8: {{.*}} movw r0, #0
-// CHECK-NEXT: 110cc: {{.*}} adr.w r0, #-4
-// CHECK-NEXT: 110d0: {{.*}} ldr.w r0, [pc, #-4]
+// CHECK: 200b4: {{.*}} beq.w #0 <_start+0x4>
+// CHECK-NEXT: 200b8: {{.*}} b.w #0 <_start+0x8>
+// CHECK-NEXT: 200bc: {{.*}} bl #0
+/// blx is transformed into bl so we don't change state
+// CHECK-NEXT: 200c0: {{.*}} bl #0
+// CHECK-NEXT: 200c4: {{.*}} movt r0, #0
+// CHECK-NEXT: 200c8: {{.*}} movw r0, #0
+// CHECK-NEXT: 200cc: {{.*}} adr.w r0, #-4
+// CHECK-NEXT: 200d0: {{.*}} ldr.w r0, [pc, #-4]
diff --git a/lld/test/ELF/arm-thunk-largesection.s b/lld/test/ELF/arm-thunk-largesection.s
index 1fc37cf3b4c5..f51d8dc4187f 100644
--- a/lld/test/ELF/arm-thunk-largesection.s
+++ b/lld/test/ELF/arm-thunk-largesection.s
@@ -1,11 +1,11 @@
// REQUIRES: arm
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
// RUN: ld.lld %t -o %t2
-// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi --start-address=0x12000 --stop-address=0x12006 %t2 | FileCheck --check-prefix=CHECK1 %s
-// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi --start-address=0x13004 --stop-address=0x13008 %t2 | FileCheck --check-prefix=CHECK2 %s
-// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi --start-address=0x1012ff8 --stop-address=0x1012ffc %t2 | FileCheck --check-prefix=CHECK3 %s
-// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi --start-address=0x2012ff8 --stop-address=0x2012ffc %t2 | FileCheck --check-prefix=CHECK4 %s
-// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi --start-address=0x3012fec --stop-address=0x3012ff6 %t2 | FileCheck --check-prefix=CHECK5 %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7a-none-linux-gnueabi --start-address=0x21000 --stop-address=0x21006 %t2 | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7a-none-linux-gnueabi --start-address=0x22004 --stop-address=0x22008 %t2 | FileCheck --check-prefix=CHECK2 %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7a-none-linux-gnueabi --start-address=0x1021ff8 --stop-address=0x1021ffc %t2 | FileCheck --check-prefix=CHECK3 %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7a-none-linux-gnueabi --start-address=0x2012ff8 --stop-address=0x2021ffc %t2 | FileCheck --check-prefix=CHECK4 %s
+// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7a-none-linux-gnueabi --start-address=0x3021fec --stop-address=0x3021ff6 %t2 | FileCheck --check-prefix=CHECK5 %s
.syntax unified
.balign 0x1000
.thumb
@@ -15,19 +15,16 @@
_start:
bx lr
.space 0x1000
-// CHECK1: Disassembly of section .text:
-// CHECK1-EMPTY:
-// CHECK1-NEXT: <_start>:
-// CHECK1-NEXT: 12000: 70 47 bx lr
-// CHECK1-EMPTY:
-// CHECK1-NEXT: <$d.1>:
-// CHECK1-NEXT: 12002: 00 00 00 00 .word 0x00000000
+// CHECK1: <_start>:
+// CHECK1-NEXT: 21000: bx lr
+// CHECK1: <$d.1>:
+// CHECK1-NEXT: 21002: 00 00 00 00 .word 0x00000000
-// CHECK2: <__Thumbv7ABSLongThunk__start>:
-// CHECK2-NEXT: 13004: fe f7 fc bf b.w #-4104 <_start>
+// CHECK2: <__Thumbv7ABSLongThunk__start>:
+// CHECK2-NEXT: 22004: b.w #-4104 <_start>
-// Gigantic section where we need a ThunkSection either side of it
+/// Gigantic section where we need a ThunkSection either side of it
.section .text.large1, "ax", %progbits
.balign 4
.space (16 * 1024 * 1024) - 16
@@ -35,10 +32,10 @@ _start:
.space (16 * 1024 * 1024) - 4
bl _start
.space (16 * 1024 * 1024) - 16
-// CHECK3: 1012ff8: 00 f4 04 d0 bl #-16777208
-// CHECK4: 2012ff8: ff f3 f8 d7 bl #16777200
+// CHECK3: 1021ff8: bl #-16777208
+// CHECK4: 2021ff8: bl #16777200
-// CHECK5: <__Thumbv7ABSLongThunk__start>:
-// CHECK5-NEXT: 3012fec: 42 f2 01 0c movw r12, #8193
-// CHECK5-NEXT: 3012ff0: c0 f2 01 0c movt r12, #1
-// CHECK5-NEXT: 3012ff4: 60 47 bx r12
+// CHECK5: <__Thumbv7ABSLongThunk__start>:
+// CHECK5-NEXT: 3021fec: movw r12, #4097
+// CHECK5-NEXT: 3021ff0: movt r12, #2
+// CHECK5-NEXT: 3021ff4: bx r12
diff --git a/lld/test/ELF/arm-thunk-multipass-plt.s b/lld/test/ELF/arm-thunk-multipass-plt.s
index c39ff5021a44..328a85d0e07a 100644
--- a/lld/test/ELF/arm-thunk-multipass-plt.s
+++ b/lld/test/ELF/arm-thunk-multipass-plt.s
@@ -1,19 +1,19 @@
// REQUIRES: arm
// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv5-none-linux-gnueabi %s -o %t
// RUN: ld.lld %t -o %t2 --shared
-// RUN: llvm-objdump --start-address=7340044 --stop-address=7340048 --triple=armv5-none-linux-gnueabi -d %t2 | FileCheck %s
-// RUN: llvm-objdump --start-address=8388620 --stop-address=8388624 --triple=thumbv5-none-linux-gnueabi -d %t2 | FileCheck %s --check-prefix=CHECK-CALL
-// RUN: llvm-objdump --start-address=13631520 --stop-address=13631584 --triple=armv5-none-linux-gnueabi -d %t2 | FileCheck %s --check-prefix=CHECK-PLT
-// When we create a thunk to a PLT entry the relocation is redirected to the
-// Thunk, changing its expression to a non-PLT equivalent. If the thunk
-// becomes unusable we need to restore the relocation expression to the PLT
-// form so that when we create a new thunk it targets the PLT.
+// RUN: llvm-objdump --no-show-raw-insn --start-address=7340044 --stop-address=7340048 --triple=armv5-none-linux-gnueabi -d %t2 | FileCheck %s
+// RUN: llvm-objdump --no-show-raw-insn --start-address=8388620 --stop-address=8388624 --triple=thumbv5-none-linux-gnueabi -d %t2 | FileCheck %s --check-prefix=CHECK-CALL
+// RUN: llvm-objdump --no-show-raw-insn --start-address=13631520 --stop-address=13631584 --triple=armv5-none-linux-gnueabi -d %t2 | FileCheck %s --check-prefix=CHECK-PLT
+/// When we create a thunk to a PLT entry the relocation is redirected to the
+/// Thunk, changing its expression to a non-PLT equivalent. If the thunk
+/// becomes unusable we need to restore the relocation expression to the PLT
+/// form so that when we create a new thunk it targets the PLT.
-// Test case that checks the case:
-// - Thunk is created on pass 1 to a PLT entry for preemptible
-// - Some other Thunk added in the same pass moves the thunk to
-// preemptible out of range of its caller.
-// - New Thunk is created on pass 2 to PLT entry for preemptible
+/// Test case that checks the case:
+/// - Thunk is created on pass 1 to a PLT entry for preemptible
+/// - Some other Thunk added in the same pass moves the thunk to
+/// preemptible out of range of its caller.
+/// - New Thunk is created on pass 2 to PLT entry for preemptible
.globl preemptible
.globl preemptible2
@@ -41,9 +41,9 @@ needsplt:
.section .text.07, "ax", %progbits
.space (1024 * 1024)
-// 0x70000c + 8 + 0x60002c = 0xd00040 = preemptible at plt
-// CHECK: 0070000c <__ARMV5PILongThunk_preemptible>:
-// CHECK-NEXT: 70000c: 0b 00 18 ea b #6291500
+/// 0x70000c + 8 + 0x60002c = 0xd00040 = preemptible at plt
+// CHECK: 0070000c <__ARMV5PILongThunk_preemptible>:
+// CHECK-NEXT: 70000c: b #6291500
.section .text.08, "ax", %progbits
.space (1024 * 1024) - 4
@@ -52,8 +52,8 @@ needsplt:
.balign 2
bl preemptible
bl preemptible2
-// 0x80000c + 4 - 100004 = 0x70000c = __ARMv5PILongThunk_preemptible
-// CHECK-CALL: 80000c: ff f6 fe ef blx #-1048580
+/// 0x80000c + 4 - 100004 = 0x70000c = __ARMv5PILongThunk_preemptible
+// CHECK-CALL: 80000c: blx #-1048580
.balign 2
.globl preemptible
.type preemptible, %function
@@ -72,24 +72,24 @@ preemptible2:
// CHECK-PLT: Disassembly of section .plt:
// CHECK-PLT-EMPTY:
// CHECK-PLT-NEXT: 00d00020 <$a>:
-// CHECK-PLT-NEXT: d00020: 04 e0 2d e5 str lr, [sp, #-4]!
-// CHECK-PLT-NEXT: d00024: 00 e6 8f e2 add lr, pc, #0, #12
-// CHECK-PLT-NEXT: d00028: 02 ea 8e e2 add lr, lr, #8192
-// CHECK-PLT-NEXT: d0002c: 94 f0 be e5 ldr pc, [lr, #148]!
-// CHECK-PLT: 00d00030 <$d>:
-// CHECK-PLT-NEXT: d00030: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT-NEXT: d00034: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT-NEXT: d00038: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT-NEXT: d0003c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT: 00d00040 <$a>:
-// CHECK-PLT-NEXT: d00040: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK-PLT-NEXT: d00044: 02 ca 8c e2 add r12, r12, #8192
-// CHECK-PLT-NEXT: d00048: 7c f0 bc e5 ldr pc, [r12, #124]!
-// CHECK-PLT: 00d0004c <$d>:
-// CHECK-PLT-NEXT: d0004c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT: 00d00050 <$a>:
-// CHECK-PLT-NEXT: d00050: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK-PLT-NEXT: d00054: 02 ca 8c e2 add r12, r12, #8192
-// CHECK-PLT-NEXT: d00058: 70 f0 bc e5 ldr pc, [r12, #112]!
-// CHECK-PLT: 00d0005c <$d>:
-// CHECK-PLT-NEXT: d0005c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-PLT-NEXT: d00020: str lr, [sp, #-4]!
+// CHECK-PLT-NEXT: add lr, pc, #0, #12
+// CHECK-PLT-NEXT: add lr, lr, #32, #20
+// CHECK-PLT-NEXT: ldr pc, [lr, #148]!
+// CHECK-PLT: 00d00030 <$d>:
+// CHECK-PLT-NEXT: d00030: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-PLT-NEXT: d00034: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-PLT-NEXT: d00038: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-PLT-NEXT: d0003c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-PLT: 00d00040 <$a>:
+// CHECK-PLT-NEXT: d00040: add r12, pc, #0, #12
+// CHECK-PLT-NEXT: d00044: add r12, r12, #32, #20
+// CHECK-PLT-NEXT: d00048: ldr pc, [r12, #124]!
+// CHECK-PLT: 00d0004c <$d>:
+// CHECK-PLT-NEXT: d0004c: d4 d4 d4 d4 .word 0xd4d4d4d4
+// CHECK-PLT: 00d00050 <$a>:
+// CHECK-PLT-NEXT: d00050: add r12, pc, #0, #12
+// CHECK-PLT-NEXT: d00054: add r12, r12, #32, #20
+// CHECK-PLT-NEXT: d00058: ldr pc, [r12, #112]!
+// CHECK-PLT: 00d0005c <$d>:
+// CHECK-PLT-NEXT: d0005c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-thunk-nosuitable.s b/lld/test/ELF/arm-thunk-nosuitable.s
index aea8d7fc431c..1eed54b4fbc2 100644
--- a/lld/test/ELF/arm-thunk-nosuitable.s
+++ b/lld/test/ELF/arm-thunk-nosuitable.s
@@ -1,10 +1,10 @@
// REQUIRES: arm
// RUN: llvm-mc %s --arm-add-build-attributes --triple=armv7a-linux-gnueabihf --filetype=obj -o %t.o
// RUN: ld.lld %t.o -o %t
-// RUN: llvm-objdump --triple=thumbv7a -d --start-address=0x2110b4 --stop-address=0x2110be %t | FileCheck %s
+// RUN: llvm-objdump --triple=thumbv7a -d --start-address=0x2200b4 --stop-address=0x2200be %t | FileCheck %s
- // Create a conditional branch too far away from a precreated thunk
- // section. This will need a thunk section created within range.
+ /// Create a conditional branch too far away from a precreated thunk
+ /// section. This will need a thunk section created within range.
.syntax unified
.thumb
@@ -13,17 +13,17 @@
.globl _start
.type _start, %function
_start:
- // Range of +/- 1 Megabyte, new ThunkSection will need creating after
- // .text.1
+ /// Range of +/- 1 Megabyte, new ThunkSection will need creating after
+ /// .text.1
beq.w target
.section .text.1, "ax", %progbits
bx lr
// CHECK: <_start>:
-// CHECK-NEXT: 2110b4: 00 f0 00 80 beq.w #0
+// CHECK-NEXT: 2200b4: 00 f0 00 80 beq.w #0
// CHECK: <__Thumbv7ABSLongThunk_target>:
-// CHECK-NEXT: 2110b8: 00 f0 01 90 b.w #12582914
-// CHECK: 2110bc: 70 47 bx lr
+// CHECK-NEXT: 2200b8: 00 f0 01 90 b.w #12582914
+// CHECK: 2200bc: 70 47 bx lr
.section .text.2, "ax", %progbits
.space 12 * 1024 * 1024
diff --git a/lld/test/ELF/arm-thunk-re-add.s b/lld/test/ELF/arm-thunk-re-add.s
index 0ba22b158b05..9d95e916297b 100644
--- a/lld/test/ELF/arm-thunk-re-add.s
+++ b/lld/test/ELF/arm-thunk-re-add.s
@@ -7,10 +7,10 @@
// RUN: llvm-objdump -d %t.so --start-address=17825800 --stop-address=17825826 --triple=thumbv7a-linux-gnueabihf | FileCheck --check-prefix=CHECK2 %s
// RUN: llvm-objdump -d %t.so --start-address=17825824 --stop-address=17825892 --triple=armv7a-linux-gnueabihf | FileCheck --check-prefix=CHECK3 %s
-// A branch to a Thunk that we create on pass N, can drift out of range if
-// other Thunks are added in between. In this case we must create a new Thunk
-// for the branch that is in range. We also need to make sure that if the
-// destination of the Thunk is in the PLT the new Thunk also targets the PLT
+/// A branch to a Thunk that we create on pass N, can drift out of range if
+/// other Thunks are added in between. In this case we must create a new Thunk
+/// for the branch that is in range. We also need to make sure that if the
+/// destination of the Thunk is in the PLT the new Thunk also targets the PLT
.syntax unified
.thumb
@@ -64,7 +64,7 @@ tfunc\suff\():
FUNCTION 29
FUNCTION 30
FUNCTION 31
-// Precreated Thunk Pool goes here
+/// Precreated Thunk Pool goes here
// CHECK1: <__ThumbV7PILongThunk_imported>:
// CHECK1-NEXT: 1000004: 40 f2 30 0c movw r12, #48
// CHECK1-NEXT: 1000008: c0 f2 10 0c movt r12, #16
@@ -81,7 +81,7 @@ tfunc\suff\():
.section .text.33, "ax", %progbits
.space 0x80000 - 0x14
.section .text.34, "ax", %progbits
- // Need a Thunk to the PLT entry, can use precreated ThunkSection
+ /// Need a Thunk to the PLT entry, can use precreated ThunkSection
.globl callers
.type callers, %function
callers:
@@ -103,7 +103,7 @@ callers:
// CHECK3-NEXT: <$a>:
// CHECK3-NEXT: 1100020: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK3-NEXT: 1100024: 00 e6 8f e2 add lr, pc, #0, #12
-// CHECK3-NEXT: 1100028: 02 ea 8e e2 add lr, lr, #8192
+// CHECK3-NEXT: 1100028: 20 ea 8e e2 add lr, lr, #32
// CHECK3-NEXT: 110002c: 94 f0 be e5 ldr pc, [lr, #148]!
// CHECK3: <$d>:
// CHECK3-NEXT: 1100030: d4 d4 d4 d4 .word 0xd4d4d4d4
@@ -112,13 +112,13 @@ callers:
// CHECK3-NEXT: 110003c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3: <$a>:
// CHECK3-NEXT: 1100040: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK3-NEXT: 1100044: 02 ca 8c e2 add r12, r12, #8192
+// CHECK3-NEXT: 1100044: 20 ca 8c e2 add r12, r12, #32
// CHECK3-NEXT: 1100048: 7c f0 bc e5 ldr pc, [r12, #124]!
// CHECK3: <$d>:
// CHECK3-NEXT: 110004c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK3: <$a>:
// CHECK3-NEXT: 1100050: 00 c6 8f e2 add r12, pc, #0, #12
-// CHECK3-NEXT: 1100054: 02 ca 8c e2 add r12, r12, #8192
+// CHECK3-NEXT: 1100054: 20 ca 8c e2 add r12, r12, #32
// CHECK3-NEXT: 1100058: 70 f0 bc e5 ldr pc, [r12, #112]!
// CHECK3: <$d>:
// CHECK3-NEXT: 110005c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-tls-gd-nonpreemptible.s b/lld/test/ELF/arm-tls-gd-nonpreemptible.s
index f629eb6f113f..489f293db1cb 100644
--- a/lld/test/ELF/arm-tls-gd-nonpreemptible.s
+++ b/lld/test/ELF/arm-tls-gd-nonpreemptible.s
@@ -6,9 +6,9 @@
// RUN: ld.lld %t --shared -o %t3.so
// RUN: llvm-objdump -s %t3.so | FileCheck --check-prefix=CHECK-SHARED %s
-// For an executable, we write the module index 1 and the offset into the TLS
-// directly into the GOT. For a shared library we can only write the offset
-// into the TLS directly if the symbol is non-preemptible
+/// For an executable, we write the module index 1 and the offset into the TLS
+/// directly into the GOT. For a shared library we can only write the offset
+/// into the TLS directly if the symbol is non-preemptible
.text
.syntax unified
@@ -30,9 +30,9 @@ func:
.L3:
nop
.p2align 2
-// Generate R_ARM_TLS_GD32 relocations
-// These can be resolved at static link time for executables as 1 is always the
-// module index and the offset into tls is known at static link time
+/// Generate R_ARM_TLS_GD32 relocations
+/// These can be resolved at static link time for executables as 1 is always the
+/// module index and the offset into tls is known at static link time
.Lt0: .word x1(TLSGD) + (. - .L0 - 8)
.Lt1: .word x2(TLSGD) + (. - .L1 - 8)
.Lt2: .word x3(TLSGD) + (. - .L2 - 8)
@@ -64,9 +64,9 @@ x4:
.space 4
// CHECK: Contents of section .got:
-// CHECK-NEXT: 12140 01000000 00000000 01000000 04000000
-// CHECK-NEXT: 12150 01000000 08000000 01000000 0c000000
+// CHECK-NEXT: 30140 01000000 00000000 01000000 04000000
+// CHECK-NEXT: 30150 01000000 08000000 01000000 0c000000
// CHECK-SHARED: Contents of section .got:
-// CHECK-SHARED-NEXT: 22a8 00000000 00000000 00000000 04000000
-// CHECK-SHARED-NEXT: 22b8 00000000 00000000 00000000 00000000
+// CHECK-SHARED-NEXT: 202a8 00000000 00000000 00000000 04000000
+// CHECK-SHARED-NEXT: 202b8 00000000 00000000 00000000 00000000
diff --git a/lld/test/ELF/arm-tls-gd32.s b/lld/test/ELF/arm-tls-gd32.s
index 07d92584ee34..55fadad80704 100644
--- a/lld/test/ELF/arm-tls-gd32.s
+++ b/lld/test/ELF/arm-tls-gd32.s
@@ -4,10 +4,10 @@
// RUN: llvm-readobj -S --dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
// RUN: llvm-objdump -d --triple=armv7a-linux-gnueabi %t.so | FileCheck %s
-// Test the handling of the global-dynamic TLS model. Dynamic Loader finds
-// module index R_ARM_TLS_DTPMOD32 and the offset within the module
-// R_ARM_TLS_DTPOFF32. One of the variables is hidden which permits relaxation
-// to local dynamic
+/// Test the handling of the global-dynamic TLS model. Dynamic Loader finds
+/// module index R_ARM_TLS_DTPMOD32 and the offset within the module
+/// R_ARM_TLS_DTPOFF32. One of the variables is hidden which permits relaxation
+/// to local dynamic
.text
.syntax unified
@@ -23,17 +23,17 @@ func:
nop
.p2align 2
-// Generate R_ARM_TLS_GD32 relocations
-// Allocates a pair of GOT entries dynamically relocated by R_ARM_TLS_DTPMOD32
-// and R_ARM_TLS_DTPOFF32 respectively. The literal contains the offset of the
-// first GOT entry from the place
+/// Generate R_ARM_TLS_GD32 relocations
+/// Allocates a pair of GOT entries dynamically relocated by R_ARM_TLS_DTPMOD32
+/// and R_ARM_TLS_DTPOFF32 respectively. The literal contains the offset of the
+/// first GOT entry from the place
.Lt0: .word x(TLSGD) + (. - .L0 - 8)
.Lt1: .word y(TLSGD) + (. - .L1 - 8)
.Lt2: .word z(TLSGD) + (. - .L2 - 8)
-// __thread int x = 10
-// __thread int y;
-// __thread int z __attribute((visibility("hidden")))
+/// __thread int x = 10
+/// __thread int y;
+/// __thread int z __attribute((visibility("hidden")))
.hidden z
.globl z
@@ -62,7 +62,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2210
+// SEC-NEXT: Address: 0x20210
// SEC: Size: 4
// SEC: Name: .tbss
// SEC-NEXT: Type: SHT_NOBITS
@@ -71,7 +71,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2214
+// SEC-NEXT: Address: 0x20214
// SEC: Size: 8
// SEC: Name: .got
@@ -80,26 +80,26 @@ x:
// SEC-NEXT: SHF_ALLOC
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2264
+// SEC-NEXT: Address: 0x20264
// SEC: Size: 24
// SEC: Dynamic Relocations {
-// SEC-NEXT: 0x2274 R_ARM_TLS_DTPMOD32 -
-// SEC-NEXT: 0x2264 R_ARM_TLS_DTPMOD32 x
-// SEC-NEXT: 0x2268 R_ARM_TLS_DTPOFF32 x
-// SEC-NEXT: 0x226C R_ARM_TLS_DTPMOD32 y
-// SEC-NEXT: 0x2270 R_ARM_TLS_DTPOFF32 y
+// SEC-NEXT: 0x20274 R_ARM_TLS_DTPMOD32 -
+// SEC-NEXT: 0x20264 R_ARM_TLS_DTPMOD32 x
+// SEC-NEXT: 0x20268 R_ARM_TLS_DTPOFF32 x
+// SEC-NEXT: 0x2026C R_ARM_TLS_DTPMOD32 y
+// SEC-NEXT: 0x20270 R_ARM_TLS_DTPOFF32 y
-// CHECK-LABEL: 000011f8 <func>:
-// CHECK-NEXT: 11f8: 00 f0 20 e3 nop
-// CHECK-NEXT: 11fc: 00 f0 20 e3 nop
-// CHECK-NEXT: 1200: 00 f0 20 e3 nop
+// CHECK-LABEL: 000101f8 <func>:
+// CHECK-NEXT: 101f8: 00 f0 20 e3 nop
+// CHECK-NEXT: 101fc: 00 f0 20 e3 nop
+// CHECK-NEXT: 10200: 00 f0 20 e3 nop
-// (0x2264 - 0x1204) + (0x1204 - 0x11f8 - 8) = 0x1064
-// CHECK: 1204: 64 10 00 00
-// (0x226c - 0x1204) + (0x1204 - 0x11fc - 8) = 0x1068
-// CHECK-NEXT: 1208: 68 10 00 00
-// (0x2274 - 0x1204) + (0x1204 - 0x1200 - 8) = 0x106c
-// CHECK-NEXT: 120c: 6c 10 00 00
+/// (0x20264 - 0x1204) + (0x10204 - 0x101f8 - 8) = 0x1f064
+// CHECK: 10204: 64 00 01 00
+/// (0x2026c - 0x10204) + (0x10204 - 0x101fc - 8) = 0x10068
+// CHECK-NEXT: 10208: 68 00 01 00
+/// (0x20274 - 0x10204) + (0x10204 - 0x10200 - 8) = 0x1006c
+// CHECK-NEXT: 1020c: 6c 00 01 00
diff --git a/lld/test/ELF/arm-tls-ie32.s b/lld/test/ELF/arm-tls-ie32.s
index 2a9c8a4b2a31..37418595ad18 100644
--- a/lld/test/ELF/arm-tls-ie32.s
+++ b/lld/test/ELF/arm-tls-ie32.s
@@ -4,9 +4,9 @@
// RUN: llvm-readobj -S --dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
// RUN: llvm-objdump -d --triple=armv7a-linux-gnueabi %t.so | FileCheck %s
-// Test the handling of the initial-exec TLS model. Relative location within
-// static TLS is a run-time constant computed by dynamic loader as a result
-// of the R_ARM_TLS_TPOFF32 relocation.
+/// Test the handling of the initial-exec TLS model. Relative location within
+/// static TLS is a run-time constant computed by dynamic loader as a result
+/// of the R_ARM_TLS_TPOFF32 relocation.
.syntax unified
.arm
@@ -22,16 +22,16 @@ func:
nop
.p2align 2
-// Generate R_ARM_TLS_IE32 static relocations
-// Allocates a GOT entry dynamically relocated by R_ARM_TLS_TPOFF32
-// literal contains the offset of the GOT entry from the place
+/// Generate R_ARM_TLS_IE32 static relocations
+/// Allocates a GOT entry dynamically relocated by R_ARM_TLS_TPOFF32
+/// literal contains the offset of the GOT entry from the place
.Lt0: .word x(gottpoff) + (. - .L0 - 8)
.Lt1: .word y(gottpoff) + (. - .L1 - 8)
.Lt2: .word .TLSSTART(gottpoff) + (. - .L2 - 8)
-// __thread int x = 10
-// __thread int y;
-// __thread int z __attribute((visibility("hidden")))
+/// __thread int x = 10
+/// __thread int y;
+/// __thread int z __attribute((visibility("hidden")))
.hidden z
.globl z
.globl y
@@ -73,25 +73,25 @@ x:
// SEC-NEXT: SHF_ALLOC
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2254
+// SEC-NEXT: Address: 0x20254
// SEC: Size: 12
// SEC: Dynamic Relocations {
-// SEC: 0x225C R_ARM_TLS_TPOFF32
-// SEC: 0x2254 R_ARM_TLS_TPOFF32 x
-// SEC: 0x2258 R_ARM_TLS_TPOFF32 y
+// SEC: 0x2025C R_ARM_TLS_TPOFF32
+// SEC: 0x20254 R_ARM_TLS_TPOFF32 x
+// SEC: 0x20258 R_ARM_TLS_TPOFF32 y
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <func>:
-// CHECK-NEXT: 11e8: 00 f0 20 e3 nop
-// CHECK-NEXT: 11ec: 00 f0 20 e3 nop
-// CHECK-NEXT: 11f0: 00 f0 20 e3 nop
+// CHECK-NEXT: 101e8: 00 f0 20 e3 nop
+// CHECK-NEXT: 101ec: 00 f0 20 e3 nop
+// CHECK-NEXT: 101f0: 00 f0 20 e3 nop
-// (0x2254 - 0x11f4) + (0x11f4 - 0x11e8 - 8) = 0x1064
-// CHECK: 11f4: 64 10 00 00
-// (0x2258 - 0x11f8) + (0x11f8 - 0x11ec - 8) = 0x1064
-// CHECK-NEXT: 11f8: 64 10 00 00
-// (0x225c - 0x11f8) + (0x11f8 - 0x11f0 - 8) = 0x1064
-// CHECK-NEXT: 11fc: 64 10 00 00
+/// (0x20254 - 0x101f4) + (0x101f4 - 0x101e8 - 8) = 0x10064
+// CHECK: 101f4: 64 00 01 00
+/// (0x20258 - 0x101f8) + (0x101f8 - 0x101ec - 8) = 0x10064
+// CHECK-NEXT: 101f8: 64 00 01 00
+/// (0x2025c - 0x101f8) + (0x101f8 - 0x101f0 - 8) = 0x10064
+// CHECK-NEXT: 101fc: 64 00 01 00
diff --git a/lld/test/ELF/arm-tls-ldm32.s b/lld/test/ELF/arm-tls-ldm32.s
index 62be2d49dba3..b93291431722 100644
--- a/lld/test/ELF/arm-tls-ldm32.s
+++ b/lld/test/ELF/arm-tls-ldm32.s
@@ -6,9 +6,9 @@
// RUN: ld.lld %t.o -o %t
// RUN: llvm-objdump -d --triple=armv7a-linux-gnueabi %t | FileCheck --check-prefix=CHECK-EXE %s
-// Test the handling of the local-dynamic TLS model. Dynamic loader finds
-// module index R_ARM_TLS_DTPMOD32. The offset in the next GOT slot is 0
-// The R_ARM_TLS_LDO is the offset of the variable within the TLS block.
+/// Test the handling of the local-dynamic TLS model. Dynamic loader finds
+/// module index R_ARM_TLS_DTPMOD32. The offset in the next GOT slot is 0
+/// The R_ARM_TLS_LDO is the offset of the variable within the TLS block.
.global __tls_get_addr
.text
.p2align 2
@@ -42,7 +42,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x21D0
+// SEC-NEXT: Address: 0x201D0
// SEC: Size: 4
// SEC: Name: .tbss
// SEC-NEXT: Type: SHT_NOBITS (0x8)
@@ -51,24 +51,24 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x21D4
+// SEC-NEXT: Address: 0x201D4
// SEC: Size: 4
// SEC: Dynamic Relocations {
-// SEC-NEXT: 0x2224 R_ARM_TLS_DTPMOD32 - 0x0
+// SEC-NEXT: 0x20224 R_ARM_TLS_DTPMOD32 - 0x0
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
-// CHECK-NEXT: 11c0: 00 f0 20 e3 nop
+// CHECK-NEXT: 101c0: 00 f0 20 e3 nop
-// (0x2224 - 0x11c4) + (0x11c4 - 0x11c0 - 8) = 0x105c
-// CHECK: 11c4: 5c 10 00 00
-// CHECK-NEXT: 11c8: 00 00 00 00
-// CHECK-NEXT: 11cc: 04 00 00 00
+/// (0x20224 - 0x101c4) + (0x101c4 - 0x101c0 - 8) = 0x1005c
+// CHECK: 101c4: 5c 00 01 00
+// CHECK-NEXT: 101c8: 00 00 00 00
+// CHECK-NEXT: 101cc: 04 00 00 00
// CHECK-EXE: <_start>:
-// CHECK-EXE-NEXT: 11114: 00 f0 20 e3 nop
-// CHECK-EXE: 11118: 0c 10 00 00
-// CHECK-EXE-NEXT: 1111c: 00 00 00 00
-// CHECK-EXE-NEXT: 11120: 04 00 00 00
+// CHECK-EXE-NEXT: 20114: 00 f0 20 e3 nop
+// CHECK-EXE: 20118: 0c 00 01 00
+// CHECK-EXE-NEXT: 2011c: 00 00 00 00
+// CHECK-EXE-NEXT: 20120: 04 00 00 00
diff --git a/lld/test/ELF/arm-tls-le32.s b/lld/test/ELF/arm-tls-le32.s
index 6c572e870bb2..739752209db4 100644
--- a/lld/test/ELF/arm-tls-le32.s
+++ b/lld/test/ELF/arm-tls-le32.s
@@ -4,9 +4,9 @@
// RUN: llvm-readobj -S --dyn-relocations %t | FileCheck --check-prefix=SEC %s
// RUN: llvm-objdump -d --triple=armv7a-linux-gnueabi %t | FileCheck %s
-// Test the handling of the local exec TLS model. TLS can be resolved
-// statically for an application. The code sequences assume a thread pointer
-// in r9
+/// Test the handling of the local exec TLS model. TLS can be resolved
+/// statically for an application. The code sequences assume a thread pointer
+/// in r9
.text
.syntax unified
@@ -15,15 +15,15 @@
.type _start,%function
_start:
.p2align 2
-// Generate R_ARM_TLS_LE32 relocations. These resolve statically to the offset
-// of the variable from the thread pointer
+/// Generate R_ARM_TLS_LE32 relocations. These resolve statically to the offset
+/// of the variable from the thread pointer
.Lt0: .word x(TPOFF)
.Lt1: .word y(TPOFF)
.Lt2: .word z(TPOFF)
-// __thread int x = 10
-// __thread int y;
-// __thread int z __attribute((visibility("hidden")))
+/// __thread int x = 10
+/// __thread int y;
+/// __thread int z __attribute((visibility("hidden")))
.hidden z
.globl z
@@ -52,7 +52,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x12120
+// SEC-NEXT: Address: 0x30120
// SEC: Size: 4
// SEC: Name: .tbss
// SEC-NEXT: Type: SHT_NOBITS
@@ -61,7 +61,7 @@ x:
// SEC-NEXT: SHF_TLS
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x12124
+// SEC-NEXT: Address: 0x30124
// SEC: Size: 8
// SEC: Dynamic Relocations {
@@ -70,9 +70,9 @@ x:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
-// offset of x from Thread pointer = (TcbSize + 0x0 = 0x8)
-// CHECK-NEXT: 11114: 08 00 00 00
-// offset of z from Thread pointer = (TcbSize + 0x8 = 0x10)
-// CHECK-NEXT: 11118: 10 00 00 00
-// offset of y from Thread pointer = (TcbSize + 0x4 = 0xc)
-// CHECK-NEXT: 1111c: 0c 00 00 00
+/// offset of x from Thread pointer = (TcbSize + 0x0 = 0x8)
+// CHECK-NEXT: 20114: 08 00 00 00
+/// offset of z from Thread pointer = (TcbSize + 0x8 = 0x10)
+// CHECK-NEXT: 20118: 10 00 00 00
+/// offset of y from Thread pointer = (TcbSize + 0x4 = 0xc)
+// CHECK-NEXT: 2011c: 0c 00 00 00
diff --git a/lld/test/ELF/arm-tls-norelax-gd-ie.s b/lld/test/ELF/arm-tls-norelax-gd-ie.s
index 261739409a7d..353e34b95ecf 100644
--- a/lld/test/ELF/arm-tls-norelax-gd-ie.s
+++ b/lld/test/ELF/arm-tls-norelax-gd-ie.s
@@ -5,11 +5,11 @@
// RUN: ld.lld %t1.so %t.o -o %t
// RUN: llvm-readobj -S --dyn-relocations %t | FileCheck %s
-// This tls global-dynamic sequence is with respect to a preemptible symbol but
-// is in an application so a relaxation to Initial Exec would normally be
-// possible. This would result in an assertion failure on ARM as the
-// relaxation functions can't be implemented on ARM. Check that the sequence
-// is handled as global dynamic
+/// This tls global-dynamic sequence is with respect to a preemptible symbol but
+/// is in an application so a relaxation to Initial Exec would normally be
+/// possible. This would result in an assertion failure on ARM as the
+/// relaxation functions can't be implemented on ARM. Check that the sequence
+/// is handled as global dynamic
.text
.syntax unified
@@ -25,6 +25,6 @@ func:
.Lt0: .word y(TLSGD) + (. - .L0 - 8)
// CHECK: Dynamic Relocations {
-// CHECK-NEXT: 0x12290 R_ARM_TLS_DTPMOD32 y
-// CHECK-NEXT: 0x12294 R_ARM_TLS_DTPOFF32 y
-// CHECK-NEXT: 0x132A4 R_ARM_JUMP_SLOT __tls_get_addr
+// CHECK-NEXT: 0x30290 R_ARM_TLS_DTPMOD32 y
+// CHECK-NEXT: 0x30294 R_ARM_TLS_DTPOFF32 y
+// CHECK-NEXT: 0x402A4 R_ARM_JUMP_SLOT __tls_get_addr
diff --git a/lld/test/ELF/arm-tls-norelax-gd-le.s b/lld/test/ELF/arm-tls-norelax-gd-le.s
index 0cac059cddbd..1a995f0210d9 100644
--- a/lld/test/ELF/arm-tls-norelax-gd-le.s
+++ b/lld/test/ELF/arm-tls-norelax-gd-le.s
@@ -5,11 +5,11 @@
// RUN: ld.lld %t1.so %t.o -o %t
// RUN: llvm-objdump -s %t | FileCheck %s
-// This tls global-dynamic sequence is with respect to a non-preemptible
-// symbol in an application so a relaxation to Local Exec would normally be
-// possible. This would result in an assertion failure on ARM as the
-// relaxation functions can't be implemented on ARM. Check that the sequence
-// is handled as global dynamic
+/// This tls global-dynamic sequence is with respect to a non-preemptible
+/// symbol in an application so a relaxation to Local Exec would normally be
+/// possible. This would result in an assertion failure on ARM as the
+/// relaxation functions can't be implemented on ARM. Check that the sequence
+/// is handled as global dynamic
.text
.syntax unified
@@ -32,10 +32,10 @@ x:
.type x, %object
// CHECK: Contents of section .got:
-// Module index is always 1 for executable
-// CHECK-NEXT: 12268 01000000 00000000
+/// Module index is always 1 for executable
+// CHECK-NEXT: 30268 01000000 00000000
-// Without any definition of __tls_get_addr we get an error
+/// Without any definition of __tls_get_addr we get an error
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck --check-prefix=ERR %s
// ERR: error: undefined symbol: __tls_get_addr
diff --git a/lld/test/ELF/arm-tls-norelax-ie-le.s b/lld/test/ELF/arm-tls-norelax-ie-le.s
index 90c75afe0914..12a50a16d31d 100644
--- a/lld/test/ELF/arm-tls-norelax-ie-le.s
+++ b/lld/test/ELF/arm-tls-norelax-ie-le.s
@@ -5,10 +5,10 @@
// RUN: ld.lld %t1.so %t.o -o %t
// RUN: llvm-objdump -s --triple=armv7a-linux-gnueabi %t | FileCheck %s
-// This tls Initial Exec sequence is with respect to a non-preemptible symbol
-// so a relaxation would normally be possible. This would result in an assertion
-// failure on ARM as the relaxation functions can't be implemented on ARM.
-// Check that the sequence is handled as initial exec
+/// This tls Initial Exec sequence is with respect to a non-preemptible symbol
+/// so a relaxation would normally be possible. This would result in an assertion
+/// failure on ARM as the relaxation functions can't be implemented on ARM.
+/// Check that the sequence is handled as initial exec
.text
.syntax unified
.globl func
@@ -37,5 +37,5 @@ x2:
.type x2, %object
// CHECK: Contents of section .got:
-// x1 at offset 8 from TP, x2 at offset 0xc from TP. Offsets include TCB size of 8
-// CHECK-NEXT: 1227c 08000000 0c000000
+/// x1 at offset 8 from TP, x2 at offset 0xc from TP. Offsets include TCB size of 8
+// CHECK-NEXT: 3027c 08000000 0c000000
diff --git a/lld/test/ELF/arm-tls-norelax-ld-le.s b/lld/test/ELF/arm-tls-norelax-ld-le.s
index 45c1e8632689..0834846f9ffb 100644
--- a/lld/test/ELF/arm-tls-norelax-ld-le.s
+++ b/lld/test/ELF/arm-tls-norelax-ld-le.s
@@ -32,4 +32,4 @@ x:
.word 10
// CHECK: Contents of section .got:
-// CHECK-NEXT: 1227c 01000000 00000000
+// CHECK-NEXT: 3027c 01000000 00000000
diff --git a/lld/test/ELF/arm-undefined-weak.s b/lld/test/ELF/arm-undefined-weak.s
index 727b9a7b07db..32ab54765947 100644
--- a/lld/test/ELF/arm-undefined-weak.s
+++ b/lld/test/ELF/arm-undefined-weak.s
@@ -3,11 +3,11 @@
// RUN: ld.lld --image-base=0x10000000 %t -o %t2
// RUN: llvm-objdump --triple=armv7a-none-linux-gnueabi --no-show-raw-insn -d %t2 | FileCheck %s
-// Check that the ARM ABI rules for undefined weak symbols are applied.
-// Branch instructions are resolved to the next instruction. Undefined
-// Symbols in relative are resolved to the place so S - P + A = A.
-// We place the image-base at 0x10000000 to test that a range extensions thunk
-// is not generated.
+/// Check that the ARM ABI rules for undefined weak symbols are applied.
+/// Branch instructions are resolved to the next instruction. Undefined
+/// Symbols in relative are resolved to the place so S - P + A = A.
+/// We place the image-base at 0x10000000 to test that a range extensions thunk
+/// is not generated.
.syntax unified
@@ -17,25 +17,25 @@
.text
.global _start
_start:
-// R_ARM_JUMP24
+/// R_ARM_JUMP24
b target
-// R_ARM_CALL
+/// R_ARM_CALL
bl target
-// R_ARM_CALL with exchange
+/// R_ARM_CALL with exchange
blx target
-// R_ARM_MOVT_PREL
+/// R_ARM_MOVT_PREL
movt r0, :upper16:target - .
-// R_ARM_MOVW_PREL_NC
+/// R_ARM_MOVW_PREL_NC
movw r0, :lower16:target - .
-// R_ARM_REL32
+/// R_ARM_REL32
.word target - .
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
-// CHECK-NEXT: 100010b4 <_start>:
-// CHECK-NEXT: 100010b4: b #-4
-// CHECK-NEXT: 100010b8: bl #-4
-// CHECK-NEXT: 100010bc: bl #-4
-// CHECK-NEXT: 100010c0: movt r0, #0
-// CHECK-NEXT: 100010c4: movw r0, #0
-// CHECK: 100010c8: 00 00 00 00 .word 0x00000000
+// CHECK-NEXT: 100100b4 <_start>:
+// CHECK-NEXT: 100100b4: b #-4
+// CHECK-NEXT: 100100b8: bl #-4
+// CHECK-NEXT: 100100bc: bl #-4
+// CHECK-NEXT: 100100c0: movt r0, #0
+// CHECK-NEXT: 100100c4: movw r0, #0
+// CHECK: 100100c8: 00 00 00 00 .word 0x00000000
diff --git a/lld/test/ELF/global-offset-table-position-arm.s b/lld/test/ELF/global-offset-table-position-arm.s
index cce8f3e2f876..f3a7b3c44270 100644
--- a/lld/test/ELF/global-offset-table-position-arm.s
+++ b/lld/test/ELF/global-offset-table-position-arm.s
@@ -3,7 +3,7 @@
// RUN: ld.lld --hash-style=sysv -shared %t -o %t2
// RUN: llvm-readobj --symbols %t2 | FileCheck %s
-// The ARM _GLOBAL_OFFSET_TABLE_ should be defined at the start of the .got
+/// The ARM _GLOBAL_OFFSET_TABLE_ should be defined at the start of the .got
.globl a
.type a,%object
.comm a,4,4
@@ -25,7 +25,7 @@ _start:
.data
// CHECK: Name: _GLOBAL_OFFSET_TABLE_
-// CHECK-NEXT: Value: 0x2268
+// CHECK-NEXT: Value: 0x20268
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
diff --git a/lld/test/ELF/pack-dyn-relocs-arm2.s b/lld/test/ELF/pack-dyn-relocs-arm2.s
index bcbde213d453..dbe6d1aca21c 100644
--- a/lld/test/ELF/pack-dyn-relocs-arm2.s
+++ b/lld/test/ELF/pack-dyn-relocs-arm2.s
@@ -8,40 +8,40 @@
// RUN: llvm-readobj -r %t.exe | FileCheck %s
// CHECK: Section (5) .relr.dyn {
-// CHECK-NEXT: 0x31E0 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x31E4 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x31E8 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x31EC R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x31F0 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x31F4 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x31F8 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x31FC R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3200 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3204 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3208 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x320C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3210 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3214 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3218 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x321C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3220 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3224 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3228 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x322C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3230 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3234 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3238 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x323C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3240 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3244 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3248 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x324C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3250 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3254 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3258 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x325C R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3260 R_ARM_RELATIVE - 0x0
-// CHECK-NEXT: 0x3264 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301E0 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301E4 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301E8 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301EC R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301F0 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301F4 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301F8 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x301FC R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30200 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30204 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30208 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3020C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30210 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30214 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30218 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3021C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30220 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30224 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30228 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3022C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30230 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30234 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30238 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3023C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30240 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30244 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30248 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3024C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30250 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30254 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30258 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x3025C R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30260 R_ARM_RELATIVE - 0x0
+// CHECK-NEXT: 0x30264 R_ARM_RELATIVE - 0x0
// CHECK-NEXT: }
// RUN: llvm-readobj -S --dynamic-table %t.exe | FileCheck --check-prefix=HEADER %s
diff --git a/lld/test/ELF/pack-dyn-relocs.s b/lld/test/ELF/pack-dyn-relocs.s
index 6ecf354f68a2..6c78a91c9d61 100644
--- a/lld/test/ELF/pack-dyn-relocs.s
+++ b/lld/test/ELF/pack-dyn-relocs.s
@@ -6,44 +6,44 @@
// RUN: ld.lld -pie --pack-dyn-relocs=none %t.a32.o %t.a32.so -o %t2.a32
// RUN: llvm-readobj -r %t2.a32 | FileCheck --check-prefix=UNPACKED32 %s
-// Unpacked should have the relative relocations in their natural order.
-// UNPACKED32: Section ({{.+}}) .rel.dyn {
-// UNPACKED32-NEXT: 0x331C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3320 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3324 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3328 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x332C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3330 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3334 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3338 R_ARM_RELATIVE - 0x0
-
-// UNPACKED32-NEXT: 0x3340 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3344 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3348 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x334C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3350 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3354 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3358 R_ARM_RELATIVE - 0x0
-
-// UNPACKED32-NEXT: 0x3364 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3368 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x336C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3370 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3374 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3378 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x337C R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3380 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3384 R_ARM_RELATIVE - 0x0
-// UNPACKED32-NEXT: 0x3389 R_ARM_RELATIVE - 0x0
-
-// UNPACKED32-NEXT: 0x333C R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x3360 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x338D R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x3391 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x3395 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x3399 R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x339D R_ARM_ABS32 bar2 0x0
-// UNPACKED32-NEXT: 0x335C R_ARM_ABS32 zed2 0x0
+/// Unpacked should have the relative relocations in their natural order.
+/// UNPACKED32: Section ({{.+}}) .rel.dyn {
+// UNPACKED32-NEXT: 0x3031C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30320 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30324 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30328 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3032C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30330 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30334 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30338 R_ARM_RELATIVE - 0x0
+
+// UNPACKED32-NEXT: 0x30340 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30344 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30348 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3034C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30350 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30354 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30358 R_ARM_RELATIVE - 0x0
+
+// UNPACKED32-NEXT: 0x30364 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30368 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3036C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30370 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30374 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30378 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x3037C R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30380 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30384 R_ARM_RELATIVE - 0x0
+// UNPACKED32-NEXT: 0x30389 R_ARM_RELATIVE - 0x0
+
+// UNPACKED32-NEXT: 0x3033C R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x30360 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x3038D R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x30391 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x30395 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x30399 R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x3039D R_ARM_ABS32 bar2 0x0
+// UNPACKED32-NEXT: 0x3035C R_ARM_ABS32 zed2 0x0
// UNPACKED32-NEXT: }
// RUN: ld.lld -pie --pack-dyn-relocs=android %t.a32.o %t.a32.so -o %t3.a32
@@ -69,46 +69,46 @@
// ANDROID32-HEADERS: 0x6000000F ANDROID_REL [[ADDR]]
// ANDROID32-HEADERS: 0x60000010 ANDROID_RELSZ [[SIZE]]
-// Packed should have the groups of non-relative relocations first, followed
-// by the larger groups of relative relocations (i.e. the 8 and 9 followed
-// by the 7.)
+/// Packed should have the groups of non-relative relocations first, followed
+/// by the larger groups of relative relocations (i.e. the 8 and 9 followed
+/// by the 7.)
// ANDROID32: Section ({{.+}}) .rel.dyn {
-// ANDROID32-NEXT: 0x324C R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3250 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3254 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3258 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x325C R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3260 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3264 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3268 R_ARM_RELATIVE - 0
-
-// ANDROID32-NEXT: 0x3294 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3298 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x329C R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x32A0 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x32A4 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x32A8 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x32AC R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x32B0 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x32B4 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3270 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3274 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3278 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x327C R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3280 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3284 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x3288 R_ARM_RELATIVE - 0
-// ANDROID32-NEXT: 0x32B9 R_ARM_RELATIVE - 0
-
-// ANDROID32-NEXT: 0x326C R_ARM_ABS32 bar2 0
-// ANDROID32-NEXT: 0x3290 R_ARM_ABS32 bar2 0
-// ANDROID32-NEXT: 0x32BD R_ARM_ABS32 bar2 0
-// ANDROID32-NEXT: 0x32C1 R_ARM_ABS32 bar2 0
-// ANDROID32-NEXT: 0x32C5 R_ARM_ABS32 bar2 0
-// ANDROID32-NEXT: 0x32C9 R_ARM_ABS32 bar2 0
-// ANDROID32-NEXT: 0x32CD R_ARM_ABS32 bar2 0
-
-// ANDROID32-NEXT: 0x328C R_ARM_ABS32 zed2 0
+// ANDROID32-NEXT: 0x3024C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30250 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30254 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30258 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3025C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30260 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30264 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30268 R_ARM_RELATIVE - 0
+
+// ANDROID32-NEXT: 0x30294 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30298 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3029C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x302A0 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x302A4 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x302A8 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x302AC R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x302B0 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x302B4 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30270 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30274 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30278 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x3027C R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30280 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30284 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x30288 R_ARM_RELATIVE - 0
+// ANDROID32-NEXT: 0x302B9 R_ARM_RELATIVE - 0
+
+// ANDROID32-NEXT: 0x3026C R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x30290 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x302BD R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x302C1 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x302C5 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x302C9 R_ARM_ABS32 bar2 0
+// ANDROID32-NEXT: 0x302CD R_ARM_ABS32 bar2 0
+
+// ANDROID32-NEXT: 0x3028C R_ARM_ABS32 zed2 0
// ANDROID32-NEXT: }
// RUN: ld.lld -pie --pack-dyn-relocs=relr %t.a32.o %t.a32.so -o %t4.a32
@@ -136,54 +136,54 @@
// RELR32-HEADERS: 0x00000023 RELRSZ 0x8
// RELR32-HEADERS: 0x00000025 RELRENT 0x4
-// SHT_RELR section contains address/bitmap entries
-// encoding the offsets for relative relocation.
+/// SHT_RELR section contains address/bitmap entries
+/// encoding the offsets for relative relocation.
// RAW-RELR32: Section ({{.+}}) .relr.dyn {
-// RAW-RELR32-NEXT: 0x327C
+// RAW-RELR32-NEXT: 0x3027C
// RAW-RELR32-NEXT: 0x7FCFEFF
// RAW-RELR32-NEXT: }
-// Decoded SHT_RELR section is same as UNPACKED,
-// but contains only the relative relocations.
-// Any relative relocations with odd offset stay in SHT_REL.
+/// Decoded SHT_RELR section is same as UNPACKED,
+/// but contains only the relative relocations.
+/// Any relative relocations with odd offset stay in SHT_REL.
// RELR32: Section ({{.+}}) .rel.dyn {
-// RELR32-NEXT: 0x32E9 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x329C R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x32C0 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x32ED R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x32F1 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x32F5 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x32F9 R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x32FD R_ARM_ABS32 bar2 0x0
-// RELR32-NEXT: 0x32BC R_ARM_ABS32 zed2 0x0
+// RELR32-NEXT: 0x302E9 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3029C R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x302C0 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x302ED R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x302F1 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x302F5 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x302F9 R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x302FD R_ARM_ABS32 bar2 0x0
+// RELR32-NEXT: 0x302BC R_ARM_ABS32 zed2 0x0
// RELR32-NEXT: }
// RELR32-NEXT: Section ({{.+}}) .relr.dyn {
-// RELR32-NEXT: 0x327C R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x3280 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x3284 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x3288 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x328C R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x3290 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x3294 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x3298 R_ARM_RELATIVE - 0x0
-
-// RELR32-NEXT: 0x32A0 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32A4 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32A8 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32AC R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32B0 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32B4 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32B8 R_ARM_RELATIVE - 0x0
-
-// RELR32-NEXT: 0x32C4 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32C8 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32CC R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32D0 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32D4 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32D8 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32DC R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32E0 R_ARM_RELATIVE - 0x0
-// RELR32-NEXT: 0x32E4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3027C R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x30280 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x30284 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x30288 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x3028C R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x30290 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x30294 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x30298 R_ARM_RELATIVE - 0x0
+
+// RELR32-NEXT: 0x302A0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302A4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302A8 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302AC R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302B0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302B4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302B8 R_ARM_RELATIVE - 0x0
+
+// RELR32-NEXT: 0x302C4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302C8 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302CC R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302D0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302D4 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302D8 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302DC R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302E0 R_ARM_RELATIVE - 0x0
+// RELR32-NEXT: 0x302E4 R_ARM_RELATIVE - 0x0
// RELR32-NEXT: }
// RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %p/Inputs/shared2.s -o %t.a64.so.o
@@ -318,16 +318,16 @@
// RELR64-HEADERS: 0x0000000000000023 RELRSZ 0x10
// RELR64-HEADERS: 0x0000000000000025 RELRENT 0x8
-// SHT_RELR section contains address/bitmap entries
-// encoding the offsets for relative relocation.
+/// SHT_RELR section contains address/bitmap entries
+/// encoding the offsets for relative relocation.
// RAW-RELR64: Section ({{.+}}) .relr.dyn {
// RAW-RELR64-NEXT: 0x30480
// RAW-RELR64-NEXT: 0x7FCFEFF
// RAW-RELR64-NEXT: }
-// Decoded SHT_RELR section is same as UNPACKED,
-// but contains only the relative relocations.
-// Any relative relocations with odd offset stay in SHT_RELA.
+/// Decoded SHT_RELR section is same as UNPACKED,
+/// but contains only the relative relocations.
+/// Any relative relocations with odd offset stay in SHT_RELA.
// RELR64: Section ({{.+}}) .rela.dyn {
// RELR64-NEXT: 0x30559 R_AARCH64_RELATIVE - 0xA
// RELR64-NEXT: 0x304C0 R_AARCH64_ABS64 bar2 0x1
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