[PATCH] D78312: [AMDGPU] Add 192-bit register classes
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 17 12:58:45 PDT 2020
rampitec added a comment.
Same notes about missing places as in D78348 <https://reviews.llvm.org/D78348>.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:810
let CopyCost = 8;
- let AllocationPriority = 6;
+ let AllocationPriority = 7;
let Weight = 8;
----------------
This renumbering becomes troublesome. Maybe we need a policy like AllocationPriority = Size/32.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D78312/new/
https://reviews.llvm.org/D78312
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