[PATCH] D78362: [x86] use vector instructions to lower more FP->int->FP casts

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 17 06:27:12 PDT 2020


spatel created this revision.
spatel added reviewers: craig.topper, pcordes, RKSimon.
Herald added subscribers: hiraditya, mcrosier.

This is an enhancement to D77895 <https://reviews.llvm.org/D77895> to avoid another round-trip from XMM->GPR->XMM. This time we handle the case of starting/ending with an f64 and casting to signed i32 as the intermediate value.

It's a bit more involved than I initially assumed because we need to use target-specific opcodes to represent the non-standard cast ops.


https://reviews.llvm.org/D78362

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/ftrunc.ll
  llvm/test/CodeGen/X86/isint.ll
  llvm/test/CodeGen/X86/setoeq.ll

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