[llvm] 858d8db - AMDGPU/GlobalISel: Work around another selector crash

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2020-04-17T12:07:54+01:00
New Revision: 858d8db47083d17eee5c6de5353348eaa886e5cd

URL: https://github.com/llvm/llvm-project/commit/858d8db47083d17eee5c6de5353348eaa886e5cd
DIFF: https://github.com/llvm/llvm-project/commit/858d8db47083d17eee5c6de5353348eaa886e5cd.diff

LOG: AMDGPU/GlobalISel: Work around another selector crash

This does for G_EXTRACT_VECTOR_ELT what 588bd7be366 did for G_TRUNC.

Ideally types without a corresponding register class wouldn't reach
here, but we're currently missing some (in particular a 192-bit class
is missing).

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index f1bb8f3c5033..88d66e0963ad 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -2330,6 +2330,8 @@ bool AMDGPUInstructionSelector::selectG_EXTRACT_VECTOR_ELT(
                                                                   *MRI);
   const TargetRegisterClass *DstRC = TRI.getRegClassForTypeOnBank(DstTy, *DstRB,
                                                                   *MRI);
+  if (!SrcRC || !DstRC)
+    return false;
   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||
       !RBI.constrainGenericRegister(DstReg, *DstRC, *MRI) ||
       !RBI.constrainGenericRegister(IdxReg, AMDGPU::SReg_32RegClass, *MRI))