[PATCH] D78348: [AMDGPU] Add missing AReg classes
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 17 02:07:50 PDT 2020
foad created this revision.
foad added reviewers: arsenm, rampitec.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
foad added a parent revision: D78311: [AMDGPU] New helper functions to get a register class of a given width.
foad added a child revision: D78312: [AMDGPU] Add 192-bit register classes.
Add 96-bit, 160-bit and 256-bit AReg classes to match VReg and SReg.
NFC as far as I know, but it may avoid weird legalization problems.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D78348
Files:
llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
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