[llvm] b29fca3 - [x86] auto-generate complete test checks; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 16 14:17:04 PDT 2020


Author: Sanjay Patel
Date: 2020-04-16T17:16:51-04:00
New Revision: b29fca30fa61354ae7181e8e46872ee1c92c1139

URL: https://github.com/llvm/llvm-project/commit/b29fca30fa61354ae7181e8e46872ee1c92c1139
DIFF: https://github.com/llvm/llvm-project/commit/b29fca30fa61354ae7181e8e46872ee1c92c1139.diff

LOG: [x86] auto-generate complete test checks; NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/isint.ll
    llvm/test/CodeGen/X86/setoeq.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/isint.ll b/llvm/test/CodeGen/X86/isint.ll
index 89e5f9481188..9d86b4b81bda 100644
--- a/llvm/test/CodeGen/X86/isint.ll
+++ b/llvm/test/CodeGen/X86/isint.ll
@@ -1,38 +1,58 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-pc-unknown -mattr=+sse2 | FileCheck -check-prefix=CHECK -check-prefix=CHECK64 %s
+; RUN: llc < %s -mtriple=i686-pc-unknown -mattr=+sse2 | FileCheck -check-prefix=CHECK -check-prefix=CHECK32 %s
 
 ; PR19059
-; RUN: llc < %s -mtriple=i686-pc-unknown -mattr=+sse2 | FileCheck -check-prefix=CHECK -check-prefix=CHECK32 %s
 
 define i32 @isint_return(double %d) nounwind {
-; CHECK-LABEL: isint_return:
-; CHECK-NOT: xor
-; CHECK: cvt
+; CHECK64-LABEL: isint_return:
+; CHECK64:       # %bb.0:
+; CHECK64-NEXT:    cvttsd2si %xmm0, %eax
+; CHECK64-NEXT:    cvtsi2sd %eax, %xmm1
+; CHECK64-NEXT:    cmpeqsd %xmm0, %xmm1
+; CHECK64-NEXT:    movq %xmm1, %rax
+; CHECK64-NEXT:    andl $1, %eax
+; CHECK64-NEXT:    # kill: def $eax killed $eax killed $rax
+; CHECK64-NEXT:    retq
+;
+; CHECK32-LABEL: isint_return:
+; CHECK32:       # %bb.0:
+; CHECK32-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK32-NEXT:    cvttsd2si %xmm0, %eax
+; CHECK32-NEXT:    cvtsi2sd %eax, %xmm1
+; CHECK32-NEXT:    cmpeqsd %xmm0, %xmm1
+; CHECK32-NEXT:    movd %xmm1, %eax
+; CHECK32-NEXT:    andl $1, %eax
+; CHECK32-NEXT:    retl
   %i = fptosi double %d to i32
-; CHECK-NEXT: cvt
   %e = sitofp i32 %i to double
-; CHECK: cmpeqsd
   %c = fcmp oeq double %d, %e
-; CHECK32-NOT: movd {{.*}}, %r{{.*}}
-; CHECK32-NOT: andq
-; CHECK32-NEXT: movd
-; CHECK64-NEXT: movq
-; CHECK-NEXT: andl
   %z = zext i1 %c to i32
   ret i32 %z
 }
 
 define i32 @isint_float_return(float %f) nounwind {
-; CHECK-LABEL: isint_float_return:
-; CHECK-NOT: xor
-; CHECK: cvt
+; CHECK64-LABEL: isint_float_return:
+; CHECK64:       # %bb.0:
+; CHECK64-NEXT:    cvttps2dq %xmm0, %xmm1
+; CHECK64-NEXT:    cvtdq2ps %xmm1, %xmm1
+; CHECK64-NEXT:    cmpeqss %xmm0, %xmm1
+; CHECK64-NEXT:    movd %xmm1, %eax
+; CHECK64-NEXT:    andl $1, %eax
+; CHECK64-NEXT:    retq
+;
+; CHECK32-LABEL: isint_float_return:
+; CHECK32:       # %bb.0:
+; CHECK32-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK32-NEXT:    cvttps2dq %xmm0, %xmm1
+; CHECK32-NEXT:    cvtdq2ps %xmm1, %xmm1
+; CHECK32-NEXT:    cmpeqss %xmm0, %xmm1
+; CHECK32-NEXT:    movd %xmm1, %eax
+; CHECK32-NEXT:    andl $1, %eax
+; CHECK32-NEXT:    retl
   %i = fptosi float %f to i32
-; CHECK-NEXT: cvt
   %g = sitofp i32 %i to float
-; CHECK: cmpeqss
   %c = fcmp oeq float %f, %g
-; CHECK-NOT: movd {{.*}}, %r{{.*}}
-; CHECK-NEXT: movd
-; CHECK-NEXT: andl
   %z = zext i1 %c to i32
   ret i32 %z
 }
@@ -40,15 +60,35 @@ define i32 @isint_float_return(float %f) nounwind {
 declare void @foo()
 
 define void @isint_branch(double %d) nounwind {
-; CHECK-LABEL: isint_branch:
-; CHECK: cvt
+; CHECK64-LABEL: isint_branch:
+; CHECK64:       # %bb.0:
+; CHECK64-NEXT:    cvttsd2si %xmm0, %eax
+; CHECK64-NEXT:    cvtsi2sd %eax, %xmm1
+; CHECK64-NEXT:    ucomisd %xmm1, %xmm0
+; CHECK64-NEXT:    jne .LBB2_2
+; CHECK64-NEXT:    jp .LBB2_2
+; CHECK64-NEXT:  # %bb.1: # %true
+; CHECK64-NEXT:    pushq %rax
+; CHECK64-NEXT:    callq foo
+; CHECK64-NEXT:    popq %rax
+; CHECK64-NEXT:  .LBB2_2: # %false
+; CHECK64-NEXT:    retq
+;
+; CHECK32-LABEL: isint_branch:
+; CHECK32:       # %bb.0:
+; CHECK32-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK32-NEXT:    cvttsd2si %xmm0, %eax
+; CHECK32-NEXT:    cvtsi2sd %eax, %xmm1
+; CHECK32-NEXT:    ucomisd %xmm1, %xmm0
+; CHECK32-NEXT:    jne .LBB2_2
+; CHECK32-NEXT:    jp .LBB2_2
+; CHECK32-NEXT:  # %bb.1: # %true
+; CHECK32-NEXT:    calll foo
+; CHECK32-NEXT:  .LBB2_2: # %false
+; CHECK32-NEXT:    retl
   %i = fptosi double %d to i32
-; CHECK-NEXT: cvt
   %e = sitofp i32 %i to double
-; CHECK: ucomisd
   %c = fcmp oeq double %d, %e
-; CHECK-NEXT: jne
-; CHECK-NEXT: jp
   br i1 %c, label %true, label %false
 true:
   call void @foo()

diff  --git a/llvm/test/CodeGen/X86/setoeq.ll b/llvm/test/CodeGen/X86/setoeq.ll
index 5c2f1d5c5da5..89069498c295 100644
--- a/llvm/test/CodeGen/X86/setoeq.ll
+++ b/llvm/test/CodeGen/X86/setoeq.ll
@@ -1,21 +1,40 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
 
 define zeroext i8 @t(double %x) nounwind readnone {
+; CHECK-LABEL: t:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT:    cvttsd2si %xmm0, %eax
+; CHECK-NEXT:    cvtsi2sd %eax, %xmm1
+; CHECK-NEXT:    cmpeqsd %xmm0, %xmm1
+; CHECK-NEXT:    movd %xmm1, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retl
 entry:
 	%0 = fptosi double %x to i32		; <i32> [#uses=1]
 	%1 = sitofp i32 %0 to double		; <double> [#uses=1]
 	%2 = fcmp oeq double %1, %x		; <i1> [#uses=1]
 	%retval12 = zext i1 %2 to i8		; <i8> [#uses=1]
-; CHECK: cmpeqsd
 	ret i8 %retval12
 }
 
 define zeroext i8 @u(double %x) nounwind readnone {
+; CHECK-LABEL: u:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT:    cvttsd2si %xmm0, %eax
+; CHECK-NEXT:    cvtsi2sd %eax, %xmm1
+; CHECK-NEXT:    cmpneqsd %xmm0, %xmm1
+; CHECK-NEXT:    movd %xmm1, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retl
 entry:
 	%0 = fptosi double %x to i32		; <i32> [#uses=1]
 	%1 = sitofp i32 %0 to double		; <double> [#uses=1]
 	%2 = fcmp une double %1, %x		; <i1> [#uses=1]
 	%retval12 = zext i1 %2 to i8		; <i8> [#uses=1]
-; CHECK: cmpneqsd
 	ret i8 %retval12
 }


        


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