[llvm] 588bd7b - AMDGPU/GlobalISel: Work around a selector crash

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-04-15T14:38:50-04:00
New Revision: 588bd7be366620d2319d349f7665b503d7840f45

URL: https://github.com/llvm/llvm-project/commit/588bd7be366620d2319d349f7665b503d7840f45
DIFF: https://github.com/llvm/llvm-project/commit/588bd7be366620d2319d349f7665b503d7840f45.diff

LOG: AMDGPU/GlobalISel: Work around a selector crash

Ideally types without a corresponding register class wouldn't reach
here, but we're currently missing some (in particular a 192-bit class
is missing).

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index a52816dc276b..f1bb8f3c5033 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -1627,6 +1627,8 @@ bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {
     = TRI.getRegClassForSizeOnBank(SrcSize, *SrcRB, *MRI);
   const TargetRegisterClass *DstRC
     = TRI.getRegClassForSizeOnBank(DstSize, *DstRB, *MRI);
+  if (!SrcRC || !DstRC)
+    return false;
 
   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||
       !RBI.constrainGenericRegister(DstReg, *DstRC, *MRI)) {