[llvm] 3f7f068 - [VPlan] Branches are not widened by VPWidenRecipe, assert (NFC).
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 15 04:04:33 PDT 2020
Author: Florian Hahn
Date: 2020-04-15T12:03:45+01:00
New Revision: 3f7f06888b26a910b1c39bd43601eb426c89c3e1
URL: https://github.com/llvm/llvm-project/commit/3f7f06888b26a910b1c39bd43601eb426c89c3e1
DIFF: https://github.com/llvm/llvm-project/commit/3f7f06888b26a910b1c39bd43601eb426c89c3e1.diff
LOG: [VPlan] Branches are not widened by VPWidenRecipe, assert (NFC).
Added:
Modified:
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 0107f5a2aadd..35ed4c04455e 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -6930,8 +6930,8 @@ VPRecipeBuilder::tryToWidenCall(Instruction *I, VFRange &Range, VPlan &Plan) {
}
bool VPRecipeBuilder::shouldWiden(Instruction *I, VFRange &Range) const {
- assert(!isa<PHINode>(I) && !isa<LoadInst>(I) && !isa<StoreInst>(I) &&
- "Instruction should have been handled earlier");
+ assert(!isa<BranchInst>(I) && !isa<PHINode>(I) && !isa<LoadInst>(I) &&
+ !isa<StoreInst>(I) && "Instruction should have been handled earlier");
// Instruction should be widened, unless it is scalar after vectorization,
// scalarization is profitable or it is predicated.
auto WillScalarize = [this, I](unsigned VF) -> bool {
@@ -6961,7 +6961,6 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I, VPlan &Plan) {
case Instruction::And:
case Instruction::AShr:
case Instruction::BitCast:
- case Instruction::Br:
case Instruction::FAdd:
case Instruction::FCmp:
case Instruction::FDiv:
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