[PATCH] D78144: [mlir] Fix assert on signed integer type in EDSC

[Diego Caballero via Phabricator via llvm-commits]

dcaballe created this revision.
dcaballe added reviewers: antiagainst, rriddle.
Herald added subscribers: llvm-commits, frgossen, grosul1, Joonsoo, liufengdb, lucyrfox, mgester, arpith-jacob, nicolasvasilache, shauheen, burmako, jpienaar, mehdi_amini.
Herald added a reviewer: nicolasvasilache.
Herald added a project: LLVM.

Integer types in Std dialect are signless so we should be checking
for signless integer type instead of signed integer type in EDSC.

Authored by Adam Straw <adam.d.straw at intel.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78144

Files:
  mlir/lib/Dialect/Affine/EDSC/Builders.cpp


Index: mlir/lib/Dialect/Affine/EDSC/Builders.cpp
===================================================================
--- mlir/lib/Dialect/Affine/EDSC/Builders.cpp
+++ mlir/lib/Dialect/Affine/EDSC/Builders.cpp
@@ -156,7 +156,7 @@
     return createBinaryHandle<FOp>(lhs, rhs);
   } else if (thisType.isa<VectorType>() || thisType.isa<TensorType>()) {
     auto aggregateType = thisType.cast<ShapedType>();
-    if (aggregateType.getElementType().isSignedInteger())
+    if (aggregateType.getElementType().isSignlessInteger())
       return createBinaryHandle<IOp>(lhs, rhs);
     else if (aggregateType.getElementType().isa<FloatType>())
       return createBinaryHandle<FOp>(lhs, rhs);
@@ -225,7 +225,7 @@
   (void)lhsType;
   (void)rhsType;
   assert(lhsType == rhsType && "cannot mix types in operators");
-  assert((lhsType.isa<IndexType>() || lhsType.isSignedInteger()) &&
+  assert((lhsType.isa<IndexType>() || lhsType.isSignlessInteger()) &&
          "only integer comparisons are supported");
 
   auto op = ScopedContext::getBuilder().create<CmpIOp>(


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